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[65.50.211.133]) by mx.google.com with ESMTPS id g17si1956486pgn.265.2017.03.22.07.12.08 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Mar 2017 07:12:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 65.50.211.133 as permitted sender) client-ip=65.50.211.133; Authentication-Results: mx.google.com; dkim=pass header.i=@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 65.50.211.133 as permitted sender) smtp.mailfrom=linux-mtd-bounces+patch=linaro.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=9Iv94UqRboK5yMrYinfzRCaZKaHtcfY5Asoug5TOWYA=; b=RhxDFRFr4nXW5Yg4xb41zZS+nX 7fFcp6Dwmq5e8D6ZcLyXCtLc5ye6T/fWC9kLnobpYaJjJifia5Nf6CLawVOzX7bylpDtA5PpaFDqa zKRSfEySae+NQVvfQfybFRh9F5VkoTWQfNvqUBsDP+zWey+gV7NWRjnkIZhO/DhskuxP9Lg41eVtq f4lq6o/LmxsrzwISsKMAkAD6TybO6OcJ/9J2Hst+pBPxHG8yp99Uz3uv8BKL6+Aies8IRBp6V6StX yyFk3z3A3NvfjfK0hbQbUrWttd/Y/SiXBGggIdk0vzEvGsWHVN5NDddb+3LO3YDnwH+TscpBnySK6 yu59jfRQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cqgza-0001wY-Vd; Wed, 22 Mar 2017 14:12:03 +0000 Received: from conuserg-07.nifty.com ([210.131.2.74]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cqgxI-00063D-NC for linux-mtd@lists.infradead.org; Wed, 22 Mar 2017 14:09:53 +0000 Received: from pug.jp.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id v2ME8LDb010154; Wed, 22 Mar 2017 23:08:49 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v2ME8LDb010154 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1490191730; bh=QZtC1PwWoPdhAms0pfDpaW1R8+f0pfBPDcJb0an838U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=z1TTZIWDac5ntrF2nljwHko2m556Un36ZG5A0h2yPUiTl8/vcxzGvdSfbl5AmMM43 rd64c8ZDgEJFnYMX/LluOWexWu1pecEAY+ccmVgOxRwde92m+DbpeBs2vBtuUQquP8 Z8MCWXPt9hullLsCg0TfNdk1d12rWYk3/rtSttbUuzrDWdL4Pk7icjfZpKwkw7wX7c cEarCpZCfNZ8+SMj/z2PAGOvvGfeWJwxdQurx+jq1l/gjcePbklXZPWhl7XRG2swwj XJq005pcma7FVFdVbUsZ0G7FMs+WnQdWYWcfzxGL8PPA6SoVU+Rm9dttWRqWUz7D4A 1Aa731O+gic5Q== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Subject: [PATCH v2 18/53] mtd: nand: denali: use nand_chip to hold frequently accessed data Date: Wed, 22 Mar 2017 23:07:25 +0900 Message-Id: <1490191680-14481-19-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490191680-14481-1-git-send-email-yamada.masahiro@socionext.com> References: <1490191680-14481-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170322_070941_364692_CF0FA27E X-CRM114-Status: GOOD ( 12.17 ) X-Spam-Score: -1.2 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent.monat@idquantique.com, Boris Brezillon , thorsten.christiansson@idquantique.com, Richard Weinberger , Marek Vasut , Masahiro Yamada , Artem Bityutskiy , Cyrille Pitchen , Jason Roberts , linux-kernel@vger.kernel.org, Dinh Nguyen , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Brian Norris , Enrico Jorns , David Woodhouse , Graham Moore MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org The denali_init() needs to setup a bunch of parameters of nand_chip. Replace denali->nand.(member) with chip->(member) for shorter code. Signed-off-by: Masahiro Yamada --- Changes in v2: None drivers/mtd/nand/denali.c | 68 +++++++++++++++++++++++------------------------ 1 file changed, 34 insertions(+), 34 deletions(-) -- 2.7.4 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index ff6af1d..24c35a6 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1460,7 +1460,8 @@ static void denali_drv_init(struct denali_nand_info *denali) int denali_init(struct denali_nand_info *denali) { - struct mtd_info *mtd = nand_to_mtd(&denali->nand); + struct nand_chip *chip = &denali->nand; + struct mtd_info *mtd = nand_to_mtd(chip); int ret; if (denali->platform == INTEL_CE4100) { @@ -1497,10 +1498,10 @@ int denali_init(struct denali_nand_info *denali) mtd->name = "denali-nand"; /* register the driver with the NAND core subsystem */ - denali->nand.select_chip = denali_select_chip; - denali->nand.cmdfunc = denali_cmdfunc; - denali->nand.read_byte = denali_read_byte; - denali->nand.waitfunc = denali_waitfunc; + chip->select_chip = denali_select_chip; + chip->cmdfunc = denali_cmdfunc; + chip->read_byte = denali_read_byte; + chip->waitfunc = denali_waitfunc; /* * scan for NAND devices attached to the controller @@ -1544,17 +1545,16 @@ int denali_init(struct denali_nand_info *denali) * the real pagesize and anything necessery */ denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); - denali->nand.chipsize <<= denali->devnum - 1; - denali->nand.page_shift += denali->devnum - 1; - denali->nand.pagemask = (denali->nand.chipsize >> - denali->nand.page_shift) - 1; - denali->nand.bbt_erase_shift += denali->devnum - 1; - denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift; - denali->nand.chip_shift += denali->devnum - 1; + chip->chipsize <<= denali->devnum - 1; + chip->page_shift += denali->devnum - 1; + chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; + chip->bbt_erase_shift += denali->devnum - 1; + chip->phys_erase_shift = chip->bbt_erase_shift; + chip->chip_shift += denali->devnum - 1; mtd->writesize <<= denali->devnum - 1; mtd->oobsize <<= denali->devnum - 1; mtd->erasesize <<= denali->devnum - 1; - mtd->size = denali->nand.numchips * denali->nand.chipsize; + mtd->size = chip->numchips * chip->chipsize; denali->bbtskipbytes *= denali->devnum; /* @@ -1564,29 +1564,29 @@ int denali_init(struct denali_nand_info *denali) */ /* Bad block management */ - denali->nand.bbt_td = &bbt_main_descr; - denali->nand.bbt_md = &bbt_mirror_descr; + chip->bbt_td = &bbt_main_descr; + chip->bbt_md = &bbt_mirror_descr; /* skip the scan for now until we have OOB read and write support */ - denali->nand.bbt_options |= NAND_BBT_USE_FLASH; - denali->nand.options |= NAND_SKIP_BBTSCAN; - denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; + chip->bbt_options |= NAND_BBT_USE_FLASH; + chip->options |= NAND_SKIP_BBTSCAN; + chip->ecc.mode = NAND_ECC_HW_SYNDROME; /* no subpage writes on denali */ - denali->nand.options |= NAND_NO_SUBPAGE_WRITE; + chip->options |= NAND_NO_SUBPAGE_WRITE; /* * Denali Controller only support 15bit and 8bit ECC in MRST, * so just let controller do 15bit ECC for MLC and 8bit ECC for * SLC if possible. * */ - if (!nand_is_slc(&denali->nand) && + if (!nand_is_slc(chip) && (mtd->oobsize > (denali->bbtskipbytes + ECC_15BITS * (mtd->writesize / ECC_SECTOR_SIZE)))) { /* if MLC OOB size is large enough, use 15bit ECC*/ - denali->nand.ecc.strength = 15; - denali->nand.ecc.bytes = ECC_15BITS; + chip->ecc.strength = 15; + chip->ecc.bytes = ECC_15BITS; iowrite32(15, denali->flash_reg + ECC_CORRECTION); } else if (mtd->oobsize < (denali->bbtskipbytes + ECC_8BITS * (mtd->writesize / @@ -1594,24 +1594,24 @@ int denali_init(struct denali_nand_info *denali) pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes"); goto failed_req_irq; } else { - denali->nand.ecc.strength = 8; - denali->nand.ecc.bytes = ECC_8BITS; + chip->ecc.strength = 8; + chip->ecc.bytes = ECC_8BITS; iowrite32(8, denali->flash_reg + ECC_CORRECTION); } mtd_set_ooblayout(mtd, &denali_ooblayout_ops); - denali->nand.ecc.bytes *= denali->devnum; - denali->nand.ecc.strength *= denali->devnum; + chip->ecc.bytes *= denali->devnum; + chip->ecc.strength *= denali->devnum; /* override the default read operations */ - denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum; - denali->nand.ecc.read_page = denali_read_page; - denali->nand.ecc.read_page_raw = denali_read_page_raw; - denali->nand.ecc.write_page = denali_write_page; - denali->nand.ecc.write_page_raw = denali_write_page_raw; - denali->nand.ecc.read_oob = denali_read_oob; - denali->nand.ecc.write_oob = denali_write_oob; - denali->nand.erase = denali_erase; + chip->ecc.size = ECC_SECTOR_SIZE * denali->devnum; + chip->ecc.read_page = denali_read_page; + chip->ecc.read_page_raw = denali_read_page_raw; + chip->ecc.write_page = denali_write_page; + chip->ecc.write_page_raw = denali_write_page_raw; + chip->ecc.read_oob = denali_read_oob; + chip->ecc.write_oob = denali_write_oob; + chip->erase = denali_erase; ret = nand_scan_tail(mtd); if (ret)