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Niedermayr" To: , CC: , , , Subject: [PATCH v6 0/2] gpmc wait pin additions Date: Thu, 29 Sep 2022 14:56:37 +0200 Message-ID: <20220929125639.143953-1-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5EUR01FT060:EE_|GV2PR10MB6113:EE_ X-MS-Office365-Filtering-Correlation-Id: 68183508-84d5-4848-e96d-08daa21a1297 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IvvMPcnsl3h76mgImbfYzyiqqVk2QuwP2LnCvFPSwF+lZ0SjYeL23ZHWHlbEhCjb+fwcfsIC7gg67bpLbI2zFdC2uQTey6qsM0Y8djA1yCeumUJfBXUClZOIXSPQee7QJ/mo/Awwv5iFR1Trcs+rLFSiytjxtiIbZub2w6xqu5GjGpIT/ACxY87/tdF6SZm7sfSkBoYLuBBkWSzioC/Wh9VRM9EXQ+AHv+fOCAQCW5gOyvVq6tSin3d1JS/pZOvCu44ejvFIblisL3O4LX7C47Lplhg7EetXZJeUbYg6LyrLgwDnj9DEkMG6qAnaoUOSctm1uYXH3gaS7peEjtV7FngCTFD7580OtJyWGCf70z3bVHa1T1EQBJSU3pHg1NQu6TbPJsVELVEKZajWgRG3V59VEPn2EfTqYVB9FImZQFi0ya/FNVE23dyEuZ1jen3RnYNw1Qn3y1AL2isWAlzoyrlytAddePRLQSpqycHnZm8URmhNGtDwjpzyjqIGwYnaeh6hl2RizsXc/2pOHi6BVTw6ZlkK5hnAHONF5u4x7Dnf3LGr/wIkLsBWmcQiMRJt2/Ou2VRPKKTaco9v/ngrwz3zjPHhmpjmFNODjjdXLYol5Vrl65xuNbJEeAA1PJ45dou27ukYkniTFGlMXwRn9in18jelhssvpCYKEn1yaYJY3RVxpVNgFBgoy6E0ju3n+MIbbn9O8mIAnhRjUy8UgvoQJ7LR4ZqG99tbXKSbwT6HyBK53enaEsSg0MzwUG1w5G9+Ek6OCVusihWY9jYmHBu6ZP3hSZqZdaJ3Y/CYq1Q= X-Forefront-Antispam-Report: CIP:194.138.21.76; CTRY:DE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:hybrid.siemens.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(396003)(136003)(346002)(39860400002)(376002)(451199015)(40470700004)(36840700001)(46966006)(8676002)(83380400001)(47076005)(36756003)(956004)(26005)(2616005)(336012)(54906003)(16526019)(186003)(110136005)(1076003)(316002)(2906002)(70586007)(5660300002)(82740400003)(82960400001)(356005)(4326008)(86362001)(70206006)(40460700003)(41300700001)(40480700001)(81166007)(36860700001)(8936002)(82310400005)(478600001)(66899015)(6666004)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2022 12:56:49.0360 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 68183508-84d5-4848-e96d-08daa21a1297 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a; Ip=[194.138.21.76]; Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR01FT060.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR10MB6113 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Currently it is not possible to configure the WAIT0PINPOLARITY and WAIT1PINPOLARITY bits of the GPMC_CONFIG register directly via device tree properties. It is also not possible to use the same wait-pin for different cs-regions. While the current implementation may fullfill most usecases, it may not be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where more complex interfacing options where possible. For example interfacing an ASIC which offers multiple cs-regions but only one waitpin the current driver and dt-bindings are not sufficient. While using the same waitpin for different cs-regions worked for older kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with newer kernels (>5.10). Changes since v1: * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list stays the same! * Updated eMail recipients list Changes since v2: * Remove the gpmc register configuration out of the gpiochip callbacks. In this case the memory interface configuration is not done via gpio bindings. * Some minor code fixes * Changed git commit descriptions Change since v3: * Use a uint32 dt-property instean a boolean one * If the dt-property is not set, then don't touch the GPMC_CONFIG register * Changed git commit descriptions Changes since v4: * Use checkpatch with "--strict" option * Moved wait-pin sanity checks to gpmc_read_settings_dt() * Always assign WAITPINPOLARITY_DEFAULT on error cases * Track waitpin allocation within gpmc for determine allocation origin Changes since v5: * Tracking of wait-pin allocations with polarity change detection * Introduced a new struct gpmc_waitpin * Add GPMC_* to global header definitions * Don't allow GPMC_WAITPINPOLARITY_DEFAULT when parsing dt-properties * Squashed wait-pin-polarity and shared-wait-pin patches, since they should not be separated Benedikt Niedermayr (2): memory: omap-gpmc: wait pin additions dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity .../memory-controllers/ti,gpmc-child.yaml | 7 ++ drivers/memory/omap-gpmc.c | 115 ++++++++++++++++-- include/linux/platform_data/gpmc-omap.h | 8 ++ 3 files changed, 118 insertions(+), 12 deletions(-) --- 2.25.1