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[209.132.180.67]) by mx.google.com with ESMTP id ou3si18845730pbb.11.2015.09.24.07.27.22; Thu, 24 Sep 2015 07:27:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752526AbbIXO1W (ORCPT + 5 others); Thu, 24 Sep 2015 10:27:22 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:46749 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752395AbbIXO1U (ORCPT ); Thu, 24 Sep 2015 10:27:20 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8OEQwCt013077; Thu, 24 Sep 2015 09:26:58 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OEQwfK023676; Thu, 24 Sep 2015 09:26:58 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Thu, 24 Sep 2015 09:26:58 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OEQjRT012528; Thu, 24 Sep 2015 09:26:56 -0500 From: Tero Kristo To: , , , CC: Subject: [PATCH 04/17] ARM: dts: omap4: add reset data Date: Thu, 24 Sep 2015 17:26:45 +0300 Message-ID: <1443104818-993-5-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1443104818-993-1-git-send-email-t-kristo@ti.com> References: <1443104818-993-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Copy over the reset data from hwmod database to DT. After this is taken into use, the data in hwmod database can be removed. A new node has been also added for ipu to support ipu resets. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/omap4.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index abc4473..d14c485 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -97,11 +97,25 @@ dsp { compatible = "ti,omap3-c64"; ti,hwmods = "dsp"; + reset-names = "dsp"; + resets = <&prm 0x0400 0x10 0 0x14 0>; }; iva { compatible = "ti,ivahd"; ti,hwmods = "iva"; + reset-names = "seq0", "seq1", "logic"; + resets = <&prm 0x0f00 0x10 0 0x14 0>, + <&prm 0x0f00 0x10 1 0x14 1>, + <&prm 0x0f00 0x10 2 0x14 2>; + }; + + ipu { + compatible = "ti,omap4-ipu"; + ti,hwmods = "ipu"; + reset-names = "cpu0", "cpu1"; + resets = <&prm 0x0700 0x210 0 0x214 0>, + <&prm 0x0700 0x210 1 0x214 1>; }; }; @@ -226,6 +240,7 @@ compatible = "ti,omap4-prm"; reg = <0x6000 0x3000>; interrupts = ; + #reset-cells = <5>; prm_clocks: clocks { #address-cells = <1>; @@ -234,6 +249,14 @@ prm_clockdomains: clockdomains { }; + + system_reset: system_reset { + compatible = "ti,system-reset"; + reset-names = "system", + "cold_sw"; + resets = <&prm 0x1b00 0 0 4 0>, + <&prm 0x1b00 0 1 4 1>; + }; }; scrm: scrm@a000 { @@ -553,6 +576,8 @@ interrupts = ; ti,hwmods = "mmu_dsp"; #iommu-cells = <0>; + reset-names = "mmu_cache"; + resets = <&prm 0x400 0x10 1 0x14 1>; }; mmu_ipu: mmu@55082000 { @@ -562,6 +587,8 @@ ti,hwmods = "mmu_ipu"; #iommu-cells = <0>; ti,iommu-bus-err-back; + reset-names = "mmu_cache"; + resets = <&prm 0x700 0x210 2 0x214 2>; }; wdt2: wdt@4a314000 {