From patchwork Tue Oct 18 07:55:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 77932 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp757407qge; Tue, 18 Oct 2016 00:56:10 -0700 (PDT) X-Received: by 10.98.102.84 with SMTP id a81mr2529908pfc.176.1476777370008; Tue, 18 Oct 2016 00:56:10 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id fl4si23642199pab.94.2016.10.18.00.56.09; Tue, 18 Oct 2016 00:56:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932571AbcJRH4J (ORCPT + 4 others); Tue, 18 Oct 2016 03:56:09 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:52846 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932489AbcJRH4J (ORCPT ); Tue, 18 Oct 2016 03:56:09 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u9I7tjis016203; Tue, 18 Oct 2016 02:55:45 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9I7tjD8022180; Tue, 18 Oct 2016 02:55:45 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Tue, 18 Oct 2016 02:55:45 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9I7tYEk028694; Tue, 18 Oct 2016 02:55:44 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 5/7] ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only Date: Tue, 18 Oct 2016 10:55:25 +0300 Message-ID: <1476777327-700-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476777327-700-1-git-send-email-t-kristo@ti.com> References: <1476777327-700-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Joel Fernandes Using HWSUP for l4sec clock domain is causing warnings in HWMOD code for DRA7. Based on some observations, once the clock domain goes into an IDLE state (because of no activity etc), the IDLEST for the module goes to '0x2' value which means Interface IDLE condition. So far so go, however once the MODULEMODE is set to disabled for the particular IP, the IDLEST for the module should go to '0x3', per the HW AUTO IDLE protocol. However this is not observed and there is no reason per the protocl for the transition to not happen. This could potentially be a bug in the HW AUTO state-machine. Work around for this is to use SWSUP only for the particular clockdomain. With this all the transitions of IDLEST happen correctly and warnings don't occur. Signed-off-by: Joel Fernandes Signed-off-by: Lokesh Vutla Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clockdomains7xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c index ef9ed36..6c67965 100644 --- a/arch/arm/mach-omap2/clockdomains7xx_data.c +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c @@ -409,7 +409,7 @@ .dep_bit = DRA7XX_L4SEC_STATDEP_SHIFT, .wkdep_srcs = l4sec_wkup_sleep_deps, .sleepdep_srcs = l4sec_wkup_sleep_deps, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain l3main1_7xx_clkdm = {