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[209.132.180.67]) by mx.google.com with ESMTP id yl4si4407034pbc.126.2014.04.04.03.11.13; Fri, 04 Apr 2014 03:11:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752436AbaDDKLM (ORCPT + 5 others); Fri, 4 Apr 2014 06:11:12 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:49254 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752284AbaDDKLI (ORCPT ); Fri, 4 Apr 2014 06:11:08 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s34AAfa1021148; Fri, 4 Apr 2014 05:10:41 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s34AAfOJ005593; Fri, 4 Apr 2014 05:10:41 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 4 Apr 2014 05:10:41 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s34AAWpX031341; Fri, 4 Apr 2014 05:10:39 -0500 From: Sekhar Nori To: Tony Lindgren CC: Russell King , Linux OMAP Mailing List , Linux ARM Mailing List , Sekhar Nori Subject: [PATCH v2 3/3] ARM: OMAP2+: AM43x: L2 cache support Date: Fri, 4 Apr 2014 15:40:29 +0530 Message-ID: X-Mailer: git-send-email 1.7.10.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nsekhar@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support for L2 cache controller (PL310) on AM437x SoC. Signed-off-by: Sekhar Nori --- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 1 + arch/arm/mach-omap2/omap4-common.c | 8 ++++++++ 4 files changed, 11 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 1124155..1fd34d2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -65,6 +65,7 @@ config SOC_AM43XX select ARCH_HAS_OPP select ARM_GIC select MACH_OMAP_GENERIC + select MIGHT_HAVE_CACHE_L2X0 config SOC_DRA7XX bool "TI DRA7XX" diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index c64d5f5..fc59b49 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -93,6 +93,7 @@ extern void omap3_gptimer_timer_init(void); extern void omap4_local_timer_init(void); int omap4_l2_cache_init(void); extern void omap5_realtime_timer_init(void); +int am43xx_l2_cache_init(void); void omap2420_init_early(void); void omap2430_init_early(void); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 81bc89c..131c207 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -609,6 +609,7 @@ void __init am43xx_init_early(void) am43xx_clockdomains_init(); am43xx_hwmod_init(); omap_hwmod_init_postsetup(); + am43xx_l2_cache_init(); omap_clk_soc_init = am43xx_dt_clk_init; } diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index f8b8dac..6b2a056 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -224,6 +224,14 @@ int __init omap4_l2_cache_init(void) return omap_l2_cache_init(aux_ctrl, 0xc19fffff); } + +int __init am43xx_l2_cache_init(void) +{ + u32 aux_ctrl = L310_AUX_CTRL_DATA_PREFETCH | + L310_AUX_CTRL_INSTR_PREFETCH; + + return omap_l2_cache_init(aux_ctrl, 0xcfffffff); +} #endif void __iomem *omap4_get_sar_ram_base(void)