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[209.132.180.67]) by mx.google.com with ESMTP id 5si5701843plx.823.2017.09.04.12.59.43; Mon, 04 Sep 2017 12:59:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BpB5Exnx; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754017AbdIDT7l (ORCPT + 12 others); Mon, 4 Sep 2017 15:59:41 -0400 Received: from mail-wm0-f45.google.com ([74.125.82.45]:33588 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753957AbdIDT5p (ORCPT ); Mon, 4 Sep 2017 15:57:45 -0400 Received: by mail-wm0-f45.google.com with SMTP id f145so6663904wme.0 for ; Mon, 04 Sep 2017 12:57:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9wIioYVS5jJaplv6n3a4/5RJKXAaiI/7GFQhyYZW/+M=; b=BpB5ExnxFeC6qVcqm4bQzZVjxUtZtXsB5dE4D23wyEpzRcVB6s3iFwMNWN5H6zax0A TkR7rnTEUo+DIN+sMGWIGYDPm/VKyKO41ybsWubxOohO2h6ccz5GeZeSoLYDBGjs4Ord PeAS6QHkgzsfuVgj9Z1yhDBdeiTozPrm4Uq9k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9wIioYVS5jJaplv6n3a4/5RJKXAaiI/7GFQhyYZW/+M=; b=oGnpG2EEGgmmR2gGigVcFgd5p5EO4do4fqN+sq7j31BBO0e1cenDuuH9bWfdZqFC/Z Nu6Y/8o8DEMTyppFqS0fdr93WHztsRn6c2F8fFV44CCg087B9HT+rwYLclrO5wQPQI44 9H0Gznc5PxJYhMZjpqZLUfyww4P7fipb+hmMEHZN11NIBlaZU+63ceUffd7IBrnaMZGz 1ty9/3yNDDpf5pjFaak0GXSskfAdAojcr+ZLwBXfVhemrG04pOhkcUuAb09PcrRB2PDY Q7R5pIbbPLZNNU44ugTO6GXk5hk/SA8NKlwl7wJQIJKpPFHejcadKJUeb+nmJik6i7M4 mCDA== X-Gm-Message-State: AHPjjUhIQAMLh+Rg7TOm12tBQ87bs3Vxgzg9zqug6UmG6llDq9ERfJNW yW+qYlAHQoIkyVLvwPWEvg== X-Google-Smtp-Source: ADKCNb7/vkrx8bKz4QNqS01WJ0Qjqn4aAEYDAY8YvRMPHQB+0dsZT6jz6H/JyxCTHRMHTXB8C++WhQ== X-Received: by 10.28.217.85 with SMTP id q82mr1002194wmg.89.1504555064006; Mon, 04 Sep 2017 12:57:44 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:f567:7c41:be9d:9286]) by smtp.gmail.com with ESMTPSA id 23sm10798976wrt.44.2017.09.04.12.57.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Sep 2017 12:57:43 -0700 (PDT) From: Daniel Lezcano To: rui.zhang@intel.com, edubezval@gmail.com Cc: daniel.lezcano@linaro.org, linux-pm@vger.kernel.org, kevin.wangtao@linaro.org, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 08/13] thermal/drivers/hisi: Fix configuration register setting Date: Mon, 4 Sep 2017 21:56:07 +0200 Message-Id: <1504554972-2624-8-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504554972-2624-1-git-send-email-daniel.lezcano@linaro.org> References: <1504554972-2624-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The TEMP0_CFG configuration register contains different field to set up the temperature controller. However in the code, nothing prevents a setup to overwrite the previous one: eg. writing the hdak value overwrites the sensor selection, the sensor selection overwrites the hdak value. In order to prevent such thing, use a regmap-like mechanism by reading the value before, set the corresponding bits and write the result. Signed-off-by: Daniel Lezcano --- drivers/thermal/hisi_thermal.c | 34 +++++++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c index 7747b96..10ef6bc 100644 --- a/drivers/thermal/hisi_thermal.c +++ b/drivers/thermal/hisi_thermal.c @@ -30,6 +30,8 @@ #define TEMP0_TH (0x4) #define TEMP0_RST_TH (0x8) #define TEMP0_CFG (0xC) +#define TEMP0_CFG_SS_MSK (0xF000) +#define TEMP0_CFG_HDAK_MSK (0x30) #define TEMP0_EN (0x10) #define TEMP0_INT_EN (0x14) #define TEMP0_INT_CLR (0x18) @@ -132,19 +134,41 @@ static inline void hisi_thermal_enable(void __iomem *addr, int value) writel(value, addr + TEMP0_EN); } -static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) +static inline int hisi_thermal_get_temperature(void __iomem *addr) { - writel((sensor << 12), addr + TEMP0_CFG); + return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); } -static inline int hisi_thermal_get_temperature(void __iomem *addr) +/* + * Temperature configuration register - Sensor selection + * + * Bits [19:12] + * + * 0x0: local sensor (default) + * 0x1: remote sensor 1 (ACPU cluster 1) + * 0x2: remote sensor 2 (ACPU cluster 0) + * 0x3: remote sensor 3 (G3D) + */ +static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) { - return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_SS_MSK ) | + (sensor << 12), addr + TEMP0_CFG); } +/* + * Temperature configuration register - Hdak conversion polling interval + * + * Bits [5:4] + * + * 0x0 : 0.768 ms + * 0x1 : 6.144 ms + * 0x2 : 49.152 ms + * 0x3 : 393.216 ms + */ static inline void hisi_thermal_hdak_set(void __iomem *addr, int value) { - writel(value, addr + TEMP0_CFG); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_HDAK_MSK) | + (value << 4), addr + TEMP0_CFG); } static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,