From patchwork Sat Aug 22 16:32:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 256977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51937C433E1 for ; Sat, 22 Aug 2020 16:32:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2ACEB207DA for ; Sat, 22 Aug 2020 16:32:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598113963; bh=Kk7CchBwLo3PT20ELNk1JwWtLQAZK0S0jQjYYyeYDYw=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=NBdD+PJm8wvzOZP2eEmM2pGFyqcX5aRDbXEzqmtSSsfpM1gs8gesT+w/BoAeTsnfS Bb1fiacjp+X8I25NCRDqpw+4IMMG0HyRGJlG5bESipmCwzleYx1hbviRgIiFieMgl0 fH4bj9FSL1eFsb8U4MKFneD1LH69azNCo5n04JV8= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728531AbgHVQcl (ORCPT ); Sat, 22 Aug 2020 12:32:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:40220 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728244AbgHVQcj (ORCPT ); Sat, 22 Aug 2020 12:32:39 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C24B320825; Sat, 22 Aug 2020 16:32:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598113958; bh=Kk7CchBwLo3PT20ELNk1JwWtLQAZK0S0jQjYYyeYDYw=; h=From:To:Subject:Date:In-Reply-To:References:From; b=IQuez17ANPldlgQInfKi1WDt9Up7obsqXy5A5967wALzh9d+Ojc6IM9gZmaUfjdx6 0mjwNBskyaiqStwkC2l5nu0pJeJdT4W9M4tUfBWfao6yLGA9M5aSbGbCB2izekq7Ok ShbpIIwUtUVcxrE0zdmCMN0lK5JyZ1CUF89K75XI= From: Krzysztof Kozlowski To: Lukasz Luba , Krzysztof Kozlowski , Kukjin Kim , linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] memory: samsung: exynos5422-dmc: remove unused exynos5_dmc members Date: Sat, 22 Aug 2020 18:32:17 +0200 Message-Id: <20200822163218.21857-2-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200822163218.21857-1-krzk@kernel.org> References: <20200822163218.21857-1-krzk@kernel.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The struct exynos5_dmc members bypass_rate, mx_mspll_ccore_phy, mout_mx_mspll_ccore_phy and opp_bypass are not actually used. Apparently there was a plan to store the OPP for the bypass mode in opp_bypass member, but drivers fails to do it and instead always sets target voltage during bypass mode. Signed-off-by: Krzysztof Kozlowski --- drivers/memory/samsung/exynos5422-dmc.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c index 31864ce59b25..df02afa8aa90 100644 --- a/drivers/memory/samsung/exynos5422-dmc.c +++ b/drivers/memory/samsung/exynos5422-dmc.c @@ -123,9 +123,7 @@ struct exynos5_dmc { struct mutex lock; unsigned long curr_rate; unsigned long curr_volt; - unsigned long bypass_rate; struct dmc_opp_table *opp; - struct dmc_opp_table opp_bypass; int opp_count; u32 timings_arr_size; u32 *timing_row; @@ -143,8 +141,6 @@ struct exynos5_dmc { struct clk *mout_bpll; struct clk *mout_mclk_cdrex; struct clk *mout_mx_mspll_ccore; - struct clk *mx_mspll_ccore_phy; - struct clk *mout_mx_mspll_ccore_phy; struct devfreq_event_dev **counter; int num_counters; u64 last_overflow_ts[2]; @@ -455,9 +451,6 @@ static int exynos5_dmc_align_bypass_voltage(struct exynos5_dmc *dmc, unsigned long target_volt) { int ret = 0; - unsigned long bypass_volt = dmc->opp_bypass.volt_uv; - - target_volt = max(bypass_volt, target_volt); if (dmc->curr_volt >= target_volt) return 0; @@ -1268,8 +1261,6 @@ static int exynos5_dmc_init_clks(struct exynos5_dmc *dmc) clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll); - dmc->bypass_rate = clk_get_rate(dmc->mout_mx_mspll_ccore); - clk_prepare_enable(dmc->fout_bpll); clk_prepare_enable(dmc->mout_bpll);