From patchwork Thu May 26 11:42:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 577664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FD71C433FE for ; Thu, 26 May 2022 11:43:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347202AbiEZLnv (ORCPT ); Thu, 26 May 2022 07:43:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345780AbiEZLnt (ORCPT ); Thu, 26 May 2022 07:43:49 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F7EE3DDEC for ; Thu, 26 May 2022 04:43:38 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id q92-20020a17090a17e500b001e0817e77f6so4182217pja.5 for ; Thu, 26 May 2022 04:43:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rm1D/w2QvTu4or6R4hVEWZEG7Ji+GbsLOWNM+13EdT0=; b=Fd6PbFwGgpst1ab5pqOOW4QTQNxMqsotRztlxhyBXRB9vSU8cR6l8K41Jbn967c9An MFLcQSGLMm7Mf/rirshMD4Sv+3ABPCSjnyZ4krYlhRhdAd5Dl1q4SJGjZ5qNaqRWihRA J9+lJtvhvQ0tBVhuUY6uoz/0PBzfEC2kioPqVDuMoYW2Z6WEawIjGAjeZJ6Y4UMAX7xj CRP/wK7D/TBdX68CnrinT62c0JI4dD8dZOHu33+1NBXljRLPA3AVTGkfToUUYDAN+Cg8 7HJrhThNKB0IqEON+9/H65bREo6Gg0wtQKOGiUfo/5mZbA0Uzsc54ww9Dcu8PborF3qP 7oGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rm1D/w2QvTu4or6R4hVEWZEG7Ji+GbsLOWNM+13EdT0=; b=ocBuGg+bNF0MqABjV2oOB/nV97l/W451s5uFjZsonu5dldLrFaTb4VtWA+ADv8wcbE Lwl/Kfq5ROpxwTHGwlZgxwYxM28Vyl5YenL9ubBLz2ojDIqRsoVwXX4X1MCTC0vB2hbC 5ZkuFsIrnEPlBUsNLTWYw7TB03m41Hi4fzjbZ5ObtvMf2L8ADup9FfINJpnxBdC8XDWa cH1570FvgQ1Vk3rt1nQNGKN65qjph0i3PJqp7T6KSuBw9TONF5E3x+Sd/nJjhcGsSEnl 0eK4dh5fNkcD/4gDH4Hbh+w/baNRAGVS4qEcU4Dg+IC4Rfy834SFvBGeUjwedFHnfB6n nfuQ== X-Gm-Message-State: AOAM530VwEE3OxwpICor8kLTx/TidwxQsraQDETLBVFIiyVuntqk+vsj gpeZBuGjZn6T6prmB5l87sArew== X-Google-Smtp-Source: ABdhPJwL2+vUZJljvm15zkMsICuHtMSjWDz1W5QvpfO7supCE+5odduI8PvAbAnWZVnkOOf/YRXaHQ== X-Received: by 2002:a17:90a:8916:b0:1e0:9f07:6d39 with SMTP id u22-20020a17090a891600b001e09f076d39mr2200543pjn.163.1653565417763; Thu, 26 May 2022 04:43:37 -0700 (PDT) Received: from localhost ([122.162.234.2]) by smtp.gmail.com with ESMTPSA id o20-20020a63fb14000000b003ed6b3dc52esm1331741pgh.55.2022.05.26.04.43.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 04:43:37 -0700 (PDT) From: Viresh Kumar To: "Rafael J. Wysocki" , Viresh Kumar , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/31] cpufreq: imx: Migrate to dev_pm_opp_set_config() Date: Thu, 26 May 2022 17:12:03 +0530 Message-Id: <2d9e2996d9ca9da1561f50f58520c7f2ced53e0a.1653564321.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/cpufreq/imx-cpufreq-dt.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c index 3fe9125156b4..57917b0670f2 100644 --- a/drivers/cpufreq/imx-cpufreq-dt.c +++ b/drivers/cpufreq/imx-cpufreq-dt.c @@ -86,6 +86,10 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev) u32 cell_value, supported_hw[2]; int speed_grade, mkt_segment; int ret; + struct dev_pm_opp_config config = { + .supported_hw = supported_hw, + .supported_hw_count = ARRAY_SIZE(supported_hw), + }; cpu_dev = get_cpu_device(0); @@ -153,17 +157,17 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev) dev_info(&pdev->dev, "cpu speed grade %d mkt segment %d supported-hw %#x %#x\n", speed_grade, mkt_segment, supported_hw[0], supported_hw[1]); - cpufreq_opp_table = dev_pm_opp_set_supported_hw(cpu_dev, supported_hw, 2); + cpufreq_opp_table = dev_pm_opp_set_config(cpu_dev, &config); if (IS_ERR(cpufreq_opp_table)) { ret = PTR_ERR(cpufreq_opp_table); - dev_err(&pdev->dev, "Failed to set supported opp: %d\n", ret); + dev_err(&pdev->dev, "Failed to set Opp config: %d\n", ret); return ret; } cpufreq_dt_pdev = platform_device_register_data( &pdev->dev, "cpufreq-dt", -1, NULL, 0); if (IS_ERR(cpufreq_dt_pdev)) { - dev_pm_opp_put_supported_hw(cpufreq_opp_table); + dev_pm_opp_clear_config(cpufreq_opp_table); ret = PTR_ERR(cpufreq_dt_pdev); dev_err(&pdev->dev, "Failed to register cpufreq-dt: %d\n", ret); return ret; @@ -176,7 +180,7 @@ static int imx_cpufreq_dt_remove(struct platform_device *pdev) { platform_device_unregister(cpufreq_dt_pdev); if (!of_machine_is_compatible("fsl,imx7ulp")) - dev_pm_opp_put_supported_hw(cpufreq_opp_table); + dev_pm_opp_clear_config(cpufreq_opp_table); else clk_bulk_put(ARRAY_SIZE(imx7ulp_clks), imx7ulp_clks);