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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D6.mail.protection.outlook.com (10.167.241.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7249.19 via Frontend Transport; Fri, 2 Feb 2024 08:56:53 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Fri, 2 Feb 2024 02:56:49 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH v2 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing Date: Fri, 2 Feb 2024 16:55:38 +0800 Message-ID: <8a55135d10cfc906616d3cd4530f9aac487c5034.1706863981.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D6:EE_|DS0PR12MB8788:EE_ X-MS-Office365-Filtering-Correlation-Id: eb53f080-838f-4a73-966b-08dc23cce6bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2024 08:56:53.0184 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eb53f080-838f-4a73-966b-08dc23cce6bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D6.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8788 Add quirk table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading. If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those issues fixed with correct workaround values to make pstate driver can be loaded even though there are CPPC capabilities errors. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 49 ++++++++++++++++++++++++++++++++++-- include/linux/amd-pstate.h | 6 +++++ 2 files changed, 53 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 77effc3caf6c..4d426516abb9 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -67,6 +67,7 @@ static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; static bool amd_pstate_prefcore = true; +static struct quirk_entry *quirks; /* * AMD Energy Preference Performance (EPP) @@ -111,6 +112,33 @@ static unsigned int epp_values[] = { typedef int (*cppc_mode_transition_fn)(int); +static struct quirk_entry quirk_amd_7k62 = { + .nominal_freq = 2600, + .lowest_freq = 550, +}; + +static int __init dmi_matched(const struct dmi_system_id *dmi) +{ + quirks = dmi->driver_data; + pr_info("hardware type %s found\n", dmi->ident); + + return 1; +} + +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = { + { + .callback = dmi_matched, + .ident = "AMD EPYC 7K62", + .matches = { + DMI_MATCH(DMI_PRODUCT_VERSION, "C1"), + DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"), + }, + .driver_data = &quirk_amd_7k62, + }, + {} +}; +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table); + static inline int get_mode_idx_from_str(const char *str, size_t size) { int i; @@ -600,13 +628,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_get_min_freq(struct amd_cpudata *cpudata) { struct cppc_perf_caps cppc_perf; + u32 lowest_freq; int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); if (ret) return ret; + if (quirks && quirks->lowest_freq) + lowest_freq = quirks->lowest_freq; + else + lowest_freq = cppc_perf.lowest_freq; + /* Switch to khz */ - return cppc_perf.lowest_freq * 1000; + return lowest_freq * 1000; } static int amd_get_max_freq(struct amd_cpudata *cpudata) @@ -635,12 +669,18 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata) static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { struct cppc_perf_caps cppc_perf; + u32 nominal_freq; int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); if (ret) return ret; - return cppc_perf.nominal_freq; + if (quirks && quirks->nominal_freq) + nominal_freq = quirks->nominal_freq; + else + nominal_freq = cppc_perf.nominal_freq; + + return nominal_freq; } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) @@ -1672,6 +1712,11 @@ static int __init amd_pstate_init(void) if (cpufreq_get_current_driver()) return -EEXIST; + quirks = NULL; + + /* check if this machine need CPPC quirks */ + dmi_check_system(amd_pstate_quirks_table); + switch (cppc_state) { case AMD_PSTATE_UNDEFINED: /* Disable on the following configs by default: diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index d21838835abd..7b2cbb892fd9 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -124,4 +124,10 @@ static const char * const amd_pstate_mode_string[] = { [AMD_PSTATE_GUIDED] = "guided", NULL, }; + +struct quirk_entry { + u32 nominal_freq; + u32 lowest_freq; +}; + #endif /* _LINUX_AMD_PSTATE_H */