From patchwork Fri Jun 20 17:47:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 32292 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ie0-f200.google.com (mail-ie0-f200.google.com [209.85.223.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 37AC1203C2 for ; Fri, 20 Jun 2014 17:48:11 +0000 (UTC) Received: by mail-ie0-f200.google.com with SMTP id tr6sf26633901ieb.7 for ; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=AiG7zfRUDIiLdB/acd+LuJgr40MVEzbH1ifFYsEEzyc=; b=CxvxB9fCfTDLZd+pcLtqtRDxuOxX9cGWPVtuMWZ4l5QNxixRfz/XOllFa3dF+AhxOu KQJvmZAXkbKzDOn2ycV0aogn3vyw2kYeLV0vUAYIq+egJgQB9I/K1Vi4KQihl8RxyfW+ AicnBfIGfLh0A5JhjpxxyArFj9pbQa0jDPX59WpMW9VkUae+6rXbMulQjtXCTVhCb+OQ nh/3isx56G5Axphq8K62qCYBHbHPA3rSVLuKe3IYh3HzA8PsheegloPL7VcaifyqESwq 9GWKwsmebhWqUQaUVw/QHNX63B1mCLzaCO/XYZ7r1f1w2D0JrQJdAjhzfyqjXrwbzEoX Cfvw== X-Gm-Message-State: ALoCoQmGdSMsQTiI1BGYEoMNQVCE3LudBSynhuEjmTO3iiZpP1KyUrZiK2LX6zg3SN7TSvvIIvdh X-Received: by 10.42.27.18 with SMTP id h18mr1678912icc.25.1403286490749; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.40.74 with SMTP id w68ls1132697qgw.53.gmail; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) X-Received: by 10.220.50.18 with SMTP id x18mr20504vcf.66.1403286490642; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id pz3si4512857vec.56.2014.06.20.10.48.10 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 20 Jun 2014 10:48:10 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.174 as permitted sender) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id jx11so3825712veb.5 for ; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) X-Received: by 10.58.220.230 with SMTP id pz6mr4509212vec.9.1403286490573; Fri, 20 Jun 2014 10:48:10 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp40160vcb; Fri, 20 Jun 2014 10:48:09 -0700 (PDT) X-Received: by 10.66.255.67 with SMTP id ao3mr6634051pad.25.1403286489575; Fri, 20 Jun 2014 10:48:09 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sy3si10745981pab.158.2014.06.20.10.48.08; Fri, 20 Jun 2014 10:48:08 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966211AbaFTRsG (ORCPT + 12 others); Fri, 20 Jun 2014 13:48:06 -0400 Received: from mail-oa0-f73.google.com ([209.85.219.73]:36919 "EHLO mail-oa0-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757402AbaFTRsA (ORCPT ); Fri, 20 Jun 2014 13:48:00 -0400 Received: by mail-oa0-f73.google.com with SMTP id eb12so1028521oac.2 for ; Fri, 20 Jun 2014 10:48:00 -0700 (PDT) X-Received: by 10.182.68.16 with SMTP id r16mr1928759obt.26.1403286480130; Fri, 20 Jun 2014 10:48:00 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id j5si705353yhi.1.2014.06.20.10.48.00 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jun 2014 10:48:00 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.72.141]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id E81C631C4B2; Fri, 20 Jun 2014 10:47:59 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id 8E74B803D7; Fri, 20 Jun 2014 10:47:59 -0700 (PDT) From: Doug Anderson To: Daniel Lezcano , Kukjin Kim , Tomasz Figa Cc: Vincent Guittot , Chirantan Ekbote , David Riley , olof@lixom.net, linux-samsung-soc@vger.kernel.org, Amit Daniel Kachhap , javier.martinez@collabora.co.uk, Doug Anderson , tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/3] clocksource: exynos_mct: Register the timer for stable udelay Date: Fri, 20 Jun 2014 10:47:50 -0700 Message-Id: <1403286472-6817-2-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1403286472-6817-1-git-send-email-dianders@chromium.org> References: <1403286472-6817-1-git-send-email-dianders@chromium.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: dianders@chromium.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Amit Daniel Kachhap This patch registers the exynos mct clocksource as the current timer as it has constant clock rate. This will generate correct udelay for the exynos platform and avoid using unnecessary calibrated jiffies. This change has been tested on exynos5420 based board and udelay is very close to expected. Without this patch udelay() on exynos5400 / exynos5800 is wildly inaccurate due to big.LITTLE not adjusting loops_per_jiffy correctly. Also without this patch udelay() on exynos5250 can be innacruate during transitions between frequencies < 800 MHz (you'll go 200 MHz -> 800 MHz -> 300 MHz and will run at 800 MHz for a time with the wrong loops_per_jiffy). [dianders: reworked and created version 3] Signed-off-by: Amit Daniel Kachhap Signed-off-by: Doug Anderson --- Changes in v3: - Back to exynos_frc_read for now until 32/64 is resolved. - Now returns cycles_t which matches arch/arm/include/asm/timex.h. - Rebased. - Moved registration to its own function. Changes in v2: - Added #defines for ARM and ARM64 as pointed by Doug Anderson. drivers/clocksource/exynos_mct.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 5ce99c0..ab51bf20a 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -200,10 +200,21 @@ static u64 notrace exynos4_read_sched_clock(void) return _exynos4_frc_read(); } +static struct delay_timer exynos4_delay_timer; + +static cycles_t exynos4_read_current_timer(void) +{ + return _exynos4_frc_read(); +} + static void __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(); + exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; + exynos4_delay_timer.freq = clk_rate; + register_current_timer_delay(&exynos4_delay_timer); + if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name);