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[78.151.55.40]) by smtp.gmail.com with ESMTPSA id i15-20020a05600c354f00b0040d378510adsm10138520wmq.1.2023.12.22.08.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 08:54:43 -0800 (PST) From: Peter Griffin To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, daniel.lezcano@linaro.org, tglx@linutronix.de, conor+dt@kernel.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, willmcvicker@google.com Subject: [PATCH 2/3] clk: samsung: gs101: register cmu_misc clocks early Date: Fri, 22 Dec 2023 16:53:54 +0000 Message-ID: <20231222165355.1462740-3-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231222165355.1462740-1-peter.griffin@linaro.org> References: <20231222165355.1462740-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update cmu_misc so it is registered early, as it contains the gate which clocks the Multi Core Timer (MCT). This clock is required early in boot, otherwise exynos_mct will fail obtaining the clock. Note this wasn't previously an issue as exynos_mct wasn't enabled. Signed-off-by: Peter Griffin --- drivers/clk/samsung/clk-gs101.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c index 0964bb11657f..590119a25c18 100644 --- a/drivers/clk/samsung/clk-gs101.c +++ b/drivers/clk/samsung/clk-gs101.c @@ -2478,6 +2478,15 @@ static const struct samsung_cmu_info misc_cmu_info __initconst = { .clk_name = "dout_cmu_misc_bus", }; +static void __init gs101_cmu_misc_init(struct device_node *np) +{ + exynos_arm64_register_cmu(NULL, np, &misc_cmu_info); +} + +/* Register CMU_MISC early, as it's needed for MCT timer */ +CLK_OF_DECLARE(gs101_cmu_misc, "google,gs101-cmu-misc", + gs101_cmu_misc_init); + /* ---- platform_driver ----------------------------------------------------- */ static int __init gs101_cmu_probe(struct platform_device *pdev) @@ -2495,9 +2504,6 @@ static const struct of_device_id gs101_cmu_of_match[] = { { .compatible = "google,gs101-cmu-apm", .data = &apm_cmu_info, - }, { - .compatible = "google,gs101-cmu-misc", - .data = &misc_cmu_info, }, { }, };