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[209.132.180.67]) by mx.google.com with ESMTP id e63-v6si1283034plb.305.2018.02.09.00.58.45; Fri, 09 Feb 2018 00:58:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RsvepMla; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751060AbeBII6o (ORCPT + 3 others); Fri, 9 Feb 2018 03:58:44 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:40641 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751049AbeBII6m (ORCPT ); Fri, 9 Feb 2018 03:58:42 -0500 Received: by mail-pl0-f67.google.com with SMTP id g18so1183790plo.7 for ; Fri, 09 Feb 2018 00:58:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=LFl//nfXrgiGWenvp+Um/hTO6otexkzO5h+h28gaA2I=; b=RsvepMlagSnoYxRLkXm3wCtUMVjlku73BzqNy2uZ394Gdg+O6hrsc5NDpx+DqGcCcj etDNwD+qwRk6anRD1ZyG3jEbLuMJQLMNmtU+ik+oY0D0aoJjbSrYL4dW8mftFEbzPGz3 TfnyjoAWLXm8CQ2mZ3rpjLKiQBX5nptzKB0S8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=LFl//nfXrgiGWenvp+Um/hTO6otexkzO5h+h28gaA2I=; b=q4NFajfwlyAprsw/KXvcDhkIYuwa0yf7SCnaEiKT9KzcdPA8IhmyjeVIUeYx3U6e7J TFaZzn+Wir0Q07D3Sw2k4J0+chFIazS4oVWo2zV1FOENysj+WjRDds1g78Ucs7lwbEZl 13M7NKQgEHBS7gGBx9oSVamdW1qb6pZnF8GfUtrQkwwIP6x/O3Dz8LkjnO4P4fCa7dNe mC7iESChzrbW+bKsypzLoYo3dRIO/7qGP9ZgH3uzvxky/0UAtChmf/aDPWBgH04TgfGC eM9fV88bkVG3gx8wuZsqFHUKbd4FlMMaeK2n19ZO1MWHr8y92prsSegpatIJZOmoFyAI 0gqA== X-Gm-Message-State: APf1xPD2nbpPOg2/fOUUNPwQdUoki7PWvdIHu1oaVIkKRr7cFNAjME5f UZnuB73zFIbms8MioP0pAEeJWA== X-Received: by 2002:a17:902:6e01:: with SMTP id u1-v6mr1905117plk.12.1518166721531; Fri, 09 Feb 2018 00:58:41 -0800 (PST) Received: from localhost ([122.172.61.199]) by smtp.gmail.com with ESMTPSA id j12sm12085038pfa.95.2018.02.09.00.58.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Feb 2018 00:58:40 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Eduardo Valentin , Zhang Rui , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, daniel.lezcano@linaro.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/10] ARM: dts: exynos: Remove "cooling-{min|max}-level" for CPU nodes Date: Fri, 9 Feb 2018 14:28:01 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Remove the unused properties from the CPU nodes. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/exynos4210.dtsi | 2 -- arch/arm/boot/dts/exynos4412.dtsi | 2 -- arch/arm/boot/dts/exynos5250.dtsi | 2 -- arch/arm/boot/dts/exynos5420-cpus.dtsi | 16 ---------------- arch/arm/boot/dts/exynos5422-cpus.dtsi | 16 ---------------- 5 files changed, 38 deletions(-) -- 2.15.0.194.g9af6a3dea062 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index cc978cf28267..58ab34a233da 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -49,8 +49,6 @@ 400000 975000 200000 950000 >; - cooling-min-level = <4>; - cooling-max-level = <2>; #cooling-cells = <2>; /* min followed by max */ }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index e4ad2fc0329e..5f5cc12f2075 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -42,8 +42,6 @@ clocks = <&clock CLK_ARM_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; - cooling-min-level = <13>; - cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 56626d1a4235..bb4180ef7885 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -77,8 +77,6 @@ 300000 937500 200000 925000 >; - cooling-min-level = <15>; - cooling-max-level = <9>; #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi index 123f0cef658d..a8e449471304 100644 --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi @@ -30,8 +30,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -43,8 +41,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -56,8 +52,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -69,8 +63,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -83,8 +75,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -96,8 +86,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -109,8 +97,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -122,8 +108,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi index c593809c7f08..7c130a00d1a8 100644 --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi @@ -29,8 +29,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -42,8 +40,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -55,8 +51,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -68,8 +62,6 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <539>; }; @@ -82,8 +74,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <15>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -95,8 +85,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <15>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -108,8 +96,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <15>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; }; @@ -121,8 +107,6 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; - cooling-min-level = <0>; - cooling-max-level = <15>; #cooling-cells = <2>; /* min followed by max */ capacity-dmips-mhz = <1024>; };