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Date: Thu, 10 Oct 2024 07:39:04 +0800 Message-ID: <20241009233908.153188-1-inochiama@gmail.com> X-Mailer: git-send-email 2.47.0 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SG2044 relys on an internal divisor when calculating bitrate, which means a wrong clock for the most common bitrates. So a quirk is needed for this uart device to skip the set rate call and only relys on the internal UART divisor. Inochi Amaoto (2): dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts serial: 8250_dw: Add Sophgo SG2044 quirk .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++ drivers/tty/serial/8250/8250_dw.c | 6 ++++++ 2 files changed, 10 insertions(+) --- 2.47.0