From patchwork Fri Dec 11 21:15:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D54CC4361B for ; Fri, 11 Dec 2020 22:26:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45FBA23A33 for ; Fri, 11 Dec 2020 22:26:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405539AbgLKVST (ORCPT ); Fri, 11 Dec 2020 16:18:19 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:8594 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393089AbgLKVQ6 (ORCPT ); Fri, 11 Dec 2020 16:16:58 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 13:16:14 -0800 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 21:16:10 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.13) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 21:16:10 +0000 From: Sowjanya Komatineni To: , , , , CC: , , , , , , , Subject: [PATCH v3 5/9] spi: spi-mem: Allow masters to transfer dummy cycles directly by hardware Date: Fri, 11 Dec 2020 13:15:59 -0800 Message-ID: <1607721363-8879-6-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607721363-8879-1-git-send-email-skomatineni@nvidia.com> References: <1607721363-8879-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607721374; bh=w3ehnwe0omM34FaObddURkJNKGQctD+ZomRiDYg+fkY=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=T2zumNGOUcth4VRkje5LcE5KpNHu5wMsc0AsMX1xA3DbSL3NfwThCopLRMA6fvs3i wcaKluHoisrK14lpflN03/UT06jIFpIIwEP8fnSB5AtQjPm8+SfRGVV/F0ZMxV3kRB 5HrA920F5OcjJIDYe9OdT7ERaKn7Lqa9DemaqBOKRDsL+ZqNFnEMv1dqvhzRNea4jR MR99E8BjhMD1EBsRX7mOyjo7QPy6rGeRDH9mdSd/X45cm5e0VBnRm/BOmoCfVPP3mr W+kfNlNlIybiD04g2TfbJTqzoxKh4BMxLgAc0ZRlcGP3KED/HNTFvNmczCxzYWjhyu 4vkOAV5dnRqiw== Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This patch adds a flag SPI_MASTER_USES_HW_DUMMY_CYCLES for the controllers that support transfer of dummy cycles by the hardware directly. For controller with this flag set, spi-mem driver will skip dummy bytes transfer in the spi message. Controller drivers can get the number of dummy cycles from spi_message. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi-mem.c | 18 +++++++++++------- include/linux/spi/spi.h | 8 ++++++++ 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index f3a3f19..38a523b 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -350,13 +350,17 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) } if (op->dummy.nbytes) { - memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes); - xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1; - xfers[xferpos].len = op->dummy.nbytes; - xfers[xferpos].tx_nbits = op->dummy.buswidth; - spi_message_add_tail(&xfers[xferpos], &msg); - xferpos++; - totalxferlen += op->dummy.nbytes; + if (ctlr->flags & SPI_MASTER_USES_HW_DUMMY_CYCLES) { + msg.dummy_cycles = (op->dummy.nbytes * 8) / op->dummy.buswidth; + } else { + memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes); + xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1; + xfers[xferpos].len = op->dummy.nbytes; + xfers[xferpos].tx_nbits = op->dummy.buswidth; + spi_message_add_tail(&xfers[xferpos], &msg); + xferpos++; + totalxferlen += op->dummy.nbytes; + } } if (op->data.nbytes) { diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index aa09fdc..2024149 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -512,6 +512,8 @@ struct spi_controller { #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */ +#define SPI_MASTER_USES_HW_DUMMY_CYCLES BIT(6) /* HW dummy bytes transfer */ + /* flag indicating this is an SPI slave controller */ bool slave; @@ -1022,6 +1024,12 @@ struct spi_message { unsigned actual_length; int status; + /* + * dummy cycles in the message transfer. This is used by the controller + * drivers supports transfer of dummy cycles directly by the hardware. + */ + u8 dummy_cycles; + /* for optional use by whatever driver currently owns the * spi_message ... between calls to spi_async and then later * complete(), that's the spi_controller controller driver.