From patchwork Mon Jan 4 14:31:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 357287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F10DC433E0 for ; Mon, 4 Jan 2021 14:28:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 37C1D21D93 for ; Mon, 4 Jan 2021 14:28:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726300AbhADO2S (ORCPT ); Mon, 4 Jan 2021 09:28:18 -0500 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:64444 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725830AbhADO2R (ORCPT ); Mon, 4 Jan 2021 09:28:17 -0500 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 104EPjGi030793; Mon, 4 Jan 2021 09:27:29 -0500 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 35tpm8kmuc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 04 Jan 2021 09:27:29 -0500 Received: from ASHBMBX9.ad.analog.com (ASHBMBX9.ad.analog.com [10.64.17.10]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 104ERS2A010839 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Mon, 4 Jan 2021 09:27:28 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Mon, 4 Jan 2021 09:27:27 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.721.2 via Frontend Transport; Mon, 4 Jan 2021 09:27:27 -0500 Received: from localhost.localdomain ([10.48.65.12]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 104ERLca030130; Mon, 4 Jan 2021 09:27:22 -0500 From: Alexandru Ardelean To: , CC: , , , Subject: [PATCH v2] spi: stm32: update dev_dbg() print format for SPI params Date: Mon, 4 Jan 2021 16:31:03 +0200 Message-ID: <20210104143103.56510-1-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104085923.53705-1-alexandru.ardelean@analog.com> References: <20210104085923.53705-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-04_08:2021-01-04,2021-01-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 bulkscore=0 impostorscore=0 malwarescore=0 clxscore=1015 mlxlogscore=983 phishscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2101040094 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org With the introduction of the 'include/uapi/linux/spi/spi.h' header, the type of the macros are enforced to 'unsigned long int' via the _BITUL() macro. This causes some -Wformat warnings in the spi-stm32 driver. This patch adds a double-negation operator to the bit-masks. Essentially, the important values for debugging are 0 or 1, while masking them directly would show 0 or BIT(x) values. This way, the type of the arguments are automatically re-cast. Fixes: f7005142dace ("spi: uapi: unify SPI modes into a single spi.h header") Reported-by: kernel test robot Reported-by: Stephen Rothwell Cc: Andy Shevchenko Signed-off-by: Alexandru Ardelean --- Changelog v1 -> v2: * revert to using '%d' specifiers * add !! operatior to bit-masking; this way the types are automatically re-cast * add 'Reported-by: kernel test robot ' drivers/spi/spi-stm32.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 6017209c6d2f..be0fb169d7a7 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -1028,10 +1028,10 @@ static int stm32_spi_prepare_msg(struct spi_master *master, clrb |= spi->cfg->regs->lsb_first.mask; dev_dbg(spi->dev, "cpol=%d cpha=%d lsb_first=%d cs_high=%d\n", - spi_dev->mode & SPI_CPOL, - spi_dev->mode & SPI_CPHA, - spi_dev->mode & SPI_LSB_FIRST, - spi_dev->mode & SPI_CS_HIGH); + !!(spi_dev->mode & SPI_CPOL), + !!(spi_dev->mode & SPI_CPHA), + !!(spi_dev->mode & SPI_LSB_FIRST), + !!(spi_dev->mode & SPI_CS_HIGH)); spin_lock_irqsave(&spi->lock, flags);