From patchwork Wed Jun 2 12:34:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 453767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A08FC4708F for ; Wed, 2 Jun 2021 12:35:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45382613E7 for ; Wed, 2 Jun 2021 12:35:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229845AbhFBMgw (ORCPT ); Wed, 2 Jun 2021 08:36:52 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:35266 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229610AbhFBMgw (ORCPT ); Wed, 2 Jun 2021 08:36:52 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 152CZ57o073672; Wed, 2 Jun 2021 07:35:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1622637305; bh=SqQKNsh6bz7/NUTj9eXT54AA/AulM1klcuIl12Cj+Cg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=D7aob2CwOCZ3txJrCeNdFwhFxxDvIG9Va7J4ZKgBN7oR94NWSb3ZxOFDIeTEt03Lf DQfsoyEk/QIwTREf1ARgYywRLc7DJTUBdzew/rk8aPvuDTGwCXX04gQJKooJ1FtRBW 2Qa/sI7GFxBRtFVvLiK4elrn+DMN1U0SPLmpBPrM= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 152CZ4IC014954 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Jun 2021 07:35:05 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 2 Jun 2021 07:35:04 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 2 Jun 2021 07:35:05 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 152CYKN6023646; Wed, 2 Jun 2021 07:34:55 -0500 From: Aswath Govindraju CC: Lokesh Vutla , Vignesh Raghavendra , Kishon Vijay Abraham I , Grygorii Strashko , Aswath Govindraju , Mark Brown , Rob Herring , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Nishanth Menon , Tero Kristo , , , , , Subject: [PATCH 3/5] arm64: dts: ti: am65: align ti, pindir-d0-out-d1-in property with dt-shema Date: Wed, 2 Jun 2021 18:04:13 +0530 Message-ID: <20210602123416.20378-4-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602123416.20378-1-a-govindraju@ti.com> References: <20210602123416.20378-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org ti,pindir-d0-out-d1-in property is expected to be of type boolean. Therefore, fix the property accordingly. Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index f4ec9ed52939..23d51b6a9cf2 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -575,7 +575,7 @@ #address-cells = <1>; #size-cells= <0>; - ti,pindir-d0-out-d1-in = <1>; + ti,pindir-d0-out-d1-in; }; &tscadc0 { diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index eddb2ffb93ca..1b947e2c2e74 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -299,7 +299,7 @@ pinctrl-0 = <&main_spi0_pins_default>; #address-cells = <1>; #size-cells= <0>; - ti,pindir-d0-out-d1-in = <1>; + ti,pindir-d0-out-d1-in; flash@0{ compatible = "jedec,spi-nor";