From patchwork Fri Oct 21 19:00:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 617633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 639A8C433FE for ; Fri, 21 Oct 2022 19:00:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230096AbiJUTAX (ORCPT ); Fri, 21 Oct 2022 15:00:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbiJUTAV (ORCPT ); Fri, 21 Oct 2022 15:00:21 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B27B24D8BC; Fri, 21 Oct 2022 12:00:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666378812; x=1697914812; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6KHP9T1zHMb4SNG4errxN0lomDv65adiOY/SYXWbHjM=; b=bmtdcDUi26px8GH6OPmATbLkvZsVyOE3JuGUfDtQPxHRNEXIqxaxTvfz INLPWFJWGQRJ1HQQgOvjLHf0LCEn+MKNYBBiqub4S//XIdg0YE/ISAe1W 0rroUtXXJzXVX/S32VRuUsQVjsPRJUvJsYKH19YHl/7bitEKoWB3GpaVX otBprZ9zEDjSvwYJBPtojtk0PAHwChrECpuAcagWFBS/+TgC3VogOcwda TdaXLjezJTN457ZRGuZzGe8zAEgWEcZNsWZjex9YDL6ZfHLgW2iPW+zt8 hWjw6/Ra67vCGVvTDRkWzQa76z94l5egLVFPTjO4MxMYPxJpqJLoNwdGw w==; X-IronPort-AV: E=McAfee;i="6500,9779,10507"; a="333658297" X-IronPort-AV: E=Sophos;i="5.95,202,1661842800"; d="scan'208";a="333658297" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2022 12:00:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10507"; a="773171048" X-IronPort-AV: E=Sophos;i="5.95,202,1661842800"; d="scan'208";a="773171048" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 21 Oct 2022 12:00:01 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D6FBA291; Fri, 21 Oct 2022 22:00:22 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Mark Brown , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik Subject: [PATCH v5 2/4] spi: pxa2xx: Respect Intel SSP type given by a property Date: Fri, 21 Oct 2022 22:00:16 +0300 Message-Id: <20221021190018.63646-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221021190018.63646-1-andriy.shevchenko@linux.intel.com> References: <20221021190018.63646-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Allow to set the Intel SSP type by reading the property. Only apply this to the known MFD enumerated LPSS devices. The check is done by the looking for the specifically named IO memory resource provided by upper layer. This won't be an issue in the future because we strictly prioritize the order in which we are looking for the SSP type in the code. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 93be7e8ef884..5527bcc5c729 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1462,9 +1462,12 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) const struct pci_device_id *pcidev_id = NULL; enum pxa_ssp_type type = SSP_UNDEFINED; const void *match; + bool is_lpss_priv; int status; u64 uid; + is_lpss_priv = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv"); + if (pcidev) pcidev_id = pci_match_id(pxa2xx_spi_pci_compound_match, pcidev); @@ -1473,6 +1476,15 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) type = (enum pxa_ssp_type)match; else if (pcidev_id) type = (enum pxa_ssp_type)pcidev_id->driver_data; + else if (is_lpss_priv) { + u32 value; + + status = device_property_read_u32(dev, "intel,spi-pxa2xx-type", &value); + if (status) + return ERR_PTR(status); + + type = (enum pxa_ssp_type)value; + } /* Validate the SSP type correctness */ if (!(type > SSP_UNDEFINED && type < SSP_MAX))