| Message ID | 20241025161501.485684-3-miquel.raynal@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | spi-nand/spi-mem DTR support | expand |
On Fri, Oct 25, 2024 at 06:14:39PM +0200, Miquel Raynal wrote: > There are spi devices with multiple frequency limitations depending on > the invoked command. We probably do not want to afford running at the > lowest supported frequency all the time, so if we want to get the most > of our hardware, we need to allow per-operation frequency limitations. This all makes sense to me. I'll leave it a little bit to see if anyone (especially people working with the individual devices) has any thoughts and assuming no issues apply the SPI bits on a branch. Does that sound sensible?
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index ab650ae953bb..102d351c3d04 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -184,6 +184,11 @@ bool spi_mem_default_supports_op(struct spi_mem *mem, return false; } + if (op->max_freq < mem->spi->max_speed_hz) { + if (!spi_mem_controller_is_capable(ctlr, per_op_freq)) + return false; + } + return spi_mem_check_buswidth(mem, op); } EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 8963f236911b..379c048b2eb4 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -306,10 +306,12 @@ struct spi_controller_mem_ops { * struct spi_controller_mem_caps - SPI memory controller capabilities * @dtr: Supports DTR operations * @ecc: Supports operations with error correction + * @per_op_freq: Supports per-operation frequency switching */ struct spi_controller_mem_caps { bool dtr; bool ecc; + bool per_op_freq; }; #define spi_mem_controller_is_capable(ctlr, cap) \
There are spi devices with multiple frequency limitations depending on the invoked command. We probably do not want to afford running at the lowest supported frequency all the time, so if we want to get the most of our hardware, we need to allow per-operation frequency limitations. Among all the spi-memory controllers, I believe all are capable of changing the spi frequency on the fly. Some of the drivers do not make any frequency setup though. And some others will derive a per-chip pre-scaler value which will be used forever. Actually changing the frequency on the fly is something new in Linux, so we need to carefully flag the drivers which do and do not support it. A controller capability is created for that, and the presence for this capability will always be checked before accepting such pattern. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/spi/spi-mem.c | 5 +++++ include/linux/spi/spi-mem.h | 2 ++ 2 files changed, 7 insertions(+)