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Fri, 26 Jun 2020 06:55:49 +0200 Received: from vleu-orange.cadence.com (10.160.88.83) by maileu3.global.cadence.com (10.160.88.99) with Microsoft SMTP Server (TLS) id 15.0.1367.3 via Frontend Transport; Fri, 26 Jun 2020 06:55:49 +0200 Received: from vleu-orange.cadence.com (localhost.localdomain [127.0.0.1]) by vleu-orange.cadence.com (8.14.4/8.14.4) with ESMTP id 05Q4tmcp010920; Fri, 26 Jun 2020 06:55:48 +0200 Received: (from pawell@localhost) by vleu-orange.cadence.com (8.14.4/8.14.4/Submit) id 05Q4tiwo010902; Fri, 26 Jun 2020 06:55:44 +0200 From: Pawel Laszczak To: , , , , , CC: , , , , , , , , , Pawel Laszczak Subject: [PATCH RFC 0/5] Introduced new Cadence USBSSP DRD Driver. Date: Fri, 26 Jun 2020 06:54:45 +0200 Message-ID: <20200626045450.10205-1-pawell@cadence.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:64.207.220.244; CTRY:CN; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:wcmailrelayl01.cadence.com; PTR:ErrorRetry; CAT:NONE; SFTY:; SFS:(4636009)(376002)(396003)(39860400002)(346002)(136003)(36092001)(46966005)(186003)(26005)(54906003)(8936002)(8676002)(70586007)(70206006)(110136005)(336012)(426003)(7416002)(107886003)(316002)(4326008)(36906005)(1076003)(42186006)(478600001)(36756003)(5660300002)(82740400003)(83380400001)(82310400002)(47076004)(81166007)(86362001)(2616005)(356005)(2906002); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d9335667-61b8-4771-3890-08d8198d344d X-MS-TrafficTypeDiagnostic: BYAPR07MB4920: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-Forefront-PRVS: 0446F0FCE1 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: unlaVhqUjGpAFe6ihnfIuyizTSj8iSFx+B4G604L5KD+J3YX5VUt7VTtOIFHVi0BQMzXqlDSwDHxshvVe70nBIs9OBD2xM8xfa2gjRUQMG0fnRzoflDSPXEDr4k81UJeyIBQV9nnvLZoZM6+2ywZjh+4CoCaEIodsnsuFINWDdz2zUhsYE/ujNXndLkF2sshcyX9r9WskhTFBj6VlMcKPh8yCKnf5NO9UPiPAWahgWvPL5zCLteUZGqF0rbxvbRdaciQjtsthtHR+9BGd8gz5nVhS6u89A9YAHWVgXPP1VJwWtTui0A/2gcgP/xS3nLBeuz2OvZ6NUlx3fMcMxvQcJpXF1A1m6uz0tiq5KAxBhrxOTuOS6gnezlV2IwR2/LfmgZ8QulqwiNhsI9Wgm7xgksGa0tOpi4vmddESCQgz+E= X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jun 2020 04:55:53.0344 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9335667-61b8-4771-3890-08d8198d344d X-MS-Exchange-CrossTenant-Id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=d36035c5-6ce6-4662-a3dc-e762e61ae4c9; Ip=[64.207.220.244]; Helo=[wcmailrelayl01.cadence.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM12FT027.eop-nam12.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR07MB4920 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-26_01:2020-06-26,2020-06-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 phishscore=0 mlxlogscore=628 priorityscore=1501 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 mlxscore=0 adultscore=0 suspectscore=0 cotscore=-2147483648 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006260034 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This patch introduce new Cadence USBSS DRD driver to linux kernel. The Cadence USBSS DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA burned. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS-DRD controller is compliance with XHCI specification, so it works with standard XHCI Linux driver. The host side of USBSS DRD controller is compliant with XHCI. The architecture for device side is almost the same as for host side, and most of the XHCI specification can be used to understand how this controller operates. This controller and driver support Full Speed, Hight Speed, Supper Speed and Supper Speed Plus USB protocol. The prefix cdnsp used in driver has chosen by analogy to cdn3 driver. The last letter of this acronym means PLUS. The formal name of controller is USBSSP but it's to generic so I've decided to use CDNSP. The patch 1: adds DT binding. The patch 2: adds PCI to platform wrapper used on Cadnece testing platform. It is FPGA based on platform. The patches 3-5: add the main part of driver and has been intentionally split into 3 part. In my opinion such division should not affect understanding and reviewing the driver, and cause that main patch (4/5) is little smaller. Patch 3 introduces main header file for driver, 4 is the main part that implements all functionality of driver and 5 introduces tracepoints. --- Pawel Laszczak (5): dt-bindings: add binding for CDNSP-DRD controller usb:cdns3: Add pci to platform driver wrapper usb: cdnsp: Device side header file for CDNSP driver usb: cdnsp: usb:cdns3 Add main part of Cadence USBSSP DRD Driver usb: cdnsp: Add tracepoints for CDNSP driver .../devicetree/bindings/usb/cdns-cdnsp.yaml | 104 + drivers/usb/Kconfig | 1 + drivers/usb/Makefile | 1 + drivers/usb/cdnsp/Kconfig | 49 + drivers/usb/cdnsp/Makefile | 15 + drivers/usb/cdnsp/cdnsp-pci.c | 214 ++ drivers/usb/cdnsp/core.c | 632 +++++ drivers/usb/cdnsp/core.h | 90 + drivers/usb/cdnsp/debug.h | 583 ++++ drivers/usb/cdnsp/drd.c | 372 +++ drivers/usb/cdnsp/drd.h | 127 + drivers/usb/cdnsp/ep0.c | 482 ++++ drivers/usb/cdnsp/export.h | 36 + drivers/usb/cdnsp/gadget.c | 1990 ++++++++++++++ drivers/usb/cdnsp/gadget.h | 1586 +++++++++++ drivers/usb/cdnsp/host.c | 74 + drivers/usb/cdnsp/mem.c | 1340 +++++++++ drivers/usb/cdnsp/ring.c | 2443 +++++++++++++++++ drivers/usb/cdnsp/trace.c | 12 + drivers/usb/cdnsp/trace.h | 839 ++++++ 20 files changed, 10990 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/cdns-cdnsp.yaml create mode 100644 drivers/usb/cdnsp/Kconfig create mode 100644 drivers/usb/cdnsp/Makefile create mode 100644 drivers/usb/cdnsp/cdnsp-pci.c create mode 100644 drivers/usb/cdnsp/core.c create mode 100644 drivers/usb/cdnsp/core.h create mode 100644 drivers/usb/cdnsp/debug.h create mode 100644 drivers/usb/cdnsp/drd.c create mode 100644 drivers/usb/cdnsp/drd.h create mode 100644 drivers/usb/cdnsp/ep0.c create mode 100644 drivers/usb/cdnsp/export.h create mode 100644 drivers/usb/cdnsp/gadget.c create mode 100644 drivers/usb/cdnsp/gadget.h create mode 100644 drivers/usb/cdnsp/host.c create mode 100644 drivers/usb/cdnsp/mem.c create mode 100644 drivers/usb/cdnsp/ring.c create mode 100644 drivers/usb/cdnsp/trace.c create mode 100644 drivers/usb/cdnsp/trace.h