From patchwork Mon Jan 25 09:38:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 371123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08A3EC433DB for ; Tue, 26 Jan 2021 03:14:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CD9FC23102 for ; Tue, 26 Jan 2021 03:14:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727034AbhAYJkr (ORCPT ); Mon, 25 Jan 2021 04:40:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726957AbhAYJjw (ORCPT ); Mon, 25 Jan 2021 04:39:52 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42F4BC06121E for ; Mon, 25 Jan 2021 01:38:37 -0800 (PST) Received: from dude02.hi.pengutronix.de ([2001:67c:670:100:1d::28]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l3yKJ-00061A-Om; Mon, 25 Jan 2021 10:38:27 +0100 Received: from sha by dude02.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l3yKI-00019b-Ur; Mon, 25 Jan 2021 10:38:26 +0100 From: Sascha Hauer To: linux-usb@vger.kernel.org Cc: Minas Harutyunyan , devicetree@vger.kernel.org, kernel@pengutronix.de, Sascha Hauer Subject: [PATCH 2/2] usb: dwc2: use clk bulk API for supporting additional clocks Date: Mon, 25 Jan 2021 10:38:25 +0100 Message-Id: <20210125093825.4292-3-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210125093825.4292-1-s.hauer@pengutronix.de> References: <20210125093825.4292-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::28 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-usb@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org This switches to the clk bulk API for the dwc2 driver. With this additional clocks can be supported. Signed-off-by: Sascha Hauer --- drivers/usb/dwc2/core.h | 2 ++ drivers/usb/dwc2/platform.c | 18 ++++++++---------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 7161344c6522..4c9e2c75f3dd 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -1075,6 +1075,8 @@ struct dwc2_hsotg { spinlock_t lock; void *priv; int irq; + struct clk_bulk_data *clocks; + int num_clocks; struct clk *clk; struct reset_control *reset; struct reset_control *reset_ecc; diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index 5f18acac7406..d4a1a26103da 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -143,11 +143,9 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) if (ret) return ret; - if (hsotg->clk) { - ret = clk_prepare_enable(hsotg->clk); - if (ret) - return ret; - } + ret = clk_bulk_prepare_enable(hsotg->num_clocks, hsotg->clocks); + if (ret) + return ret; if (hsotg->uphy) { ret = usb_phy_init(hsotg->uphy); @@ -195,8 +193,7 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) if (ret) return ret; - if (hsotg->clk) - clk_disable_unprepare(hsotg->clk); + clk_bulk_disable_unprepare(hsotg->num_clocks, hsotg->clocks); return 0; } @@ -281,11 +278,12 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) hsotg->plat = dev_get_platdata(hsotg->dev); /* Clock */ - hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg"); - if (IS_ERR(hsotg->clk)) { + ret = devm_clk_bulk_get_all(hsotg->dev, &hsotg->clocks); + if (ret < 0) { dev_err(hsotg->dev, "cannot get otg clock\n"); - return PTR_ERR(hsotg->clk); + return ret; } + hsotg->num_clocks = ret; /* Regulators */ for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)