From patchwork Thu Apr 25 21:50:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 792290 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 268C8155A2B; Thu, 25 Apr 2024 21:52:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714081928; cv=none; b=Nvu9jCDBwGPKVJAYDZ/yOYCHiJfCFd1atTdH3oTxbUUDhx5npvW+pRQ/0k40i+Ry8lcPprsK9/x7KvItraVBGwkU0moiyLHhgGEk/VEVtX7t3AOUIw42va0gfAR/DzDdifT7O0b6uZLQk+Z7Hlpxt/J+kVmcEw58lVG/O5oCMj0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714081928; c=relaxed/simple; bh=W2P7l4KLZK19YrZcXmIf+wo2rOM8o2Fu5wEMGpg2QRA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=CoRDFKdcw5CUCoaHwo7AlCxh0oeDmeLMRbGt5fwYqtGi24GSfWp+plSvrVyVGjJDBo1O2jF4lpfX6vLXxmL7/gVGdsXkirYacVrjh71/0lCev8xp+id5KIbCWkKIhORuAf9BC6wtBXxPYyjYkNm5N7KMTfdUMC/76D/LF+XcK9s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=DV2TZFIK; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="DV2TZFIK" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 43PLFrSD005990; Thu, 25 Apr 2024 21:51:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=1yoLXLgWNYKdotyAO8VB 1mL3mjJ8Idj2ssbXkzyvOfs=; b=DV2TZFIKDUNtVF8QBDlNuru50tKUrrb86uBY KoyNe4uUeHTDWKZRiWIomuibE1In1wW7DiCDA61ZDkjmFpcZq+aZU1cG2LeS8oFl O3E5gxjI8uAGAycQ6gse6dhI+Bpr5wA5PBb5UWh83/Bmvt3FrHAzPUAgnjPDUFSc SZogQP3Dsw8XHROwGuINM9w0zQ2iY5d3dwFBgpIZsb3ZOo63ZFptAizL59ZK9ibp BiGmXKf8U3aYMsRK9kEtYO/V5rDZuL7wYuLFm1Crl52muhMdkhJj0knX9rnd5GIo y+ToqXnpQl7bvYxh+S/0TGIr59Az2CKo7JR8kF5pChDS8dPV9A== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xqenkks3w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 Apr 2024 21:51:39 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43PLpc0m028656 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 Apr 2024 21:51:38 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 25 Apr 2024 14:51:37 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v20 04/41] xhci: export XHCI IMOD setting helper for interrupters Date: Thu, 25 Apr 2024 14:50:48 -0700 Message-ID: <20240425215125.29761-5-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240425215125.29761-1-quic_wcheng@quicinc.com> References: <20240425215125.29761-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: LrWadjLlaiz1Rb1yK0t2YocXas3bdEp4 X-Proofpoint-GUID: LrWadjLlaiz1Rb1yK0t2YocXas3bdEp4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-25_21,2024-04-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 mlxlogscore=777 priorityscore=1501 impostorscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404250159 Utilize the xhci_set_interrupter_moderation() API to set the IMOD value for interrupters, so that secondary interrupts can also configure this parameter when clients request for it. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci.c | 3 ++- drivers/usb/host/xhci.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 061cb60ffac1..1e31a0811574 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -349,7 +349,7 @@ int xhci_disable_interrupter(struct xhci_interrupter *ir) EXPORT_SYMBOL_GPL(xhci_disable_interrupter); /* interrupt moderation interval imod_interval in nanoseconds */ -static int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, +int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, u32 imod_interval) { u32 imod; @@ -364,6 +364,7 @@ static int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, return 0; } +EXPORT_SYMBOL_GPL(xhci_set_interrupter_moderation); static void compliance_mode_recovery(struct timer_list *t) { diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 67d729635d56..bc3f18651494 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1876,6 +1876,8 @@ int xhci_alloc_tt_info(struct xhci_hcd *xhci, struct usb_tt *tt, gfp_t mem_flags); int xhci_enable_interrupter(struct xhci_interrupter *ir); int xhci_disable_interrupter(struct xhci_interrupter *ir); +int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, + u32 imod_interval); /* xHCI ring, segment, TRB, and TD functions */ dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb);