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[0/5] dt-bindings: timer: AT91 convert to YAML

Message ID 20230525125602.640855-1-claudiu.beznea@microchip.com
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Series dt-bindings: timer: AT91 convert to YAML | expand

Message

Claudiu Beznea May 25, 2023, 12:55 p.m. UTC
Hi,

Series converts AT91 timers DT bindings to YAML. Along with it the
atmel,at91rm9200-wdt has been converted and introduced in this series
as it is referenced by atmel,at91rm9200-st.

Thank you,
Claudiu Beznea

Claudiu Beznea (5):
  dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml
  ARM: dts: at91: sama7g5: keep only microchip,sam9x60-pit64b compatible
    for pit64b
  dt-bindings: timer: microchip,sam9x60-pit64b: convert to yaml
  dt-bindings: watchdog: atmel,at91rm9200-wdt: convert to yaml
  dt-bindings: timer: atmel,at91rm9200-st: convert to yaml

 .../devicetree/bindings/arm/atmel-sysregs.txt | 21 ------
 .../bindings/timer/atmel,at91rm9200-st.yaml   | 66 +++++++++++++++++++
 .../bindings/timer/atmel,at91sam9260-pit.yaml | 51 ++++++++++++++
 .../timer/microchip,sam9x60-pit64b.yaml       | 56 ++++++++++++++++
 .../watchdog/atmel,at91rm9200-wdt.yaml        | 29 ++++++++
 .../watchdog/atmel-at91rm9200-wdt.txt         |  9 ---
 arch/arm/boot/dts/sama7g5.dtsi                |  4 +-
 7 files changed, 204 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
 create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
 create mode 100644 Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
 create mode 100644 Documentation/devicetree/bindings/watchdog/atmel,at91rm9200-wdt.yaml
 delete mode 100644 Documentation/devicetree/bindings/watchdog/atmel-at91rm9200-wdt.txt

Comments

Conor Dooley May 25, 2023, 5:14 p.m. UTC | #1
On Thu, May 25, 2023 at 03:56:00PM +0300, Claudiu Beznea wrote:
> Convert Microchip PIT64B to YAML. Along with it clock-names binding has
> been added as the driver needs it to get PIT64B clocks.

I don't think both of these PIT things need to have different binding
files. 90% of it is the same, just the clock-names/number - so you can
combine the two into one file with an
allOf:
  - if:
     property:
       compatible:
         contains:
	   const: foo
    then:

    else:

type of construct.
Gimmie a shout tomorrow if you need a hand w/ it.

Thanks,
Conor.

> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  .../devicetree/bindings/arm/atmel-sysregs.txt |  6 --
>  .../timer/microchip,sam9x60-pit64b.yaml       | 56 +++++++++++++++++++
>  2 files changed, 56 insertions(+), 6 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 7024839c5da2..54d3f586403e 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -4,12 +4,6 @@ Chipid required properties:
>  - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>  - reg : Should contain registers location and length
>  
> -PIT64B Timer required properties:
> -- compatible: Should be "microchip,sam9x60-pit64b"
> -- reg: Should contain registers location and length
> -- interrupts: Should contain interrupt for PIT64B timer
> -- clocks: Should contain the available clock sources for PIT64B timer.
> -
>  System Timer (ST) required properties:
>  - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
>  - reg: Should contain registers location and length
> diff --git a/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml b/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
> new file mode 100644
> index 000000000000..9378eca38138
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/microchip,sam9x60-pit64b.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/microchip,sam9x60-pit64b.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip 64-bit Periodic Interval Timer (PIT64B)
> +
> +maintainers:
> +  - Claudiu Beznea <claudiu.beznea@microchip.com>
> +
> +description:
> +  The 64-bit periodic interval timer provides the operating system scheduler
> +  interrupt. It is designed to offer maximum accuracy and efficient management,
> +  even for systems with long response times.
> +
> +properties:
> +  compatible:
> +    const: microchip,sam9x60-pit64b
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: gclk
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/at91.h>
> +
> +    pit64b: timer@f0028000 {
> +        compatible = "microchip,sam9x60-pit64b";
> +        reg = <0xf0028000 0x100>;
> +        interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
> +        clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
> +        clock-names = "pclk", "gclk";
> +    };
> +
> +...
> -- 
> 2.34.1
>
Conor Dooley May 25, 2023, 5:27 p.m. UTC | #2
On Thu, May 25, 2023 at 03:56:02PM +0300, Claudiu Beznea wrote:
> Convert Atmel system timer to YAML.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  .../devicetree/bindings/arm/atmel-sysregs.txt |  9 ---
>  .../bindings/timer/atmel,at91rm9200-st.yaml   | 66 +++++++++++++++++++
>  2 files changed, 66 insertions(+), 9 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 54d3f586403e..68c0eacb01ac 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -4,15 +4,6 @@ Chipid required properties:
>  - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>  - reg : Should contain registers location and length
>  
> -System Timer (ST) required properties:
> -- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
> -- reg: Should contain registers location and length
> -- interrupts: Should contain interrupt for the ST which is the IRQ line
> -  shared across all System Controller members.
> -- clocks: phandle to input clock.
> -Its subnodes can be:
> -- watchdog: compatible should be "atmel,at91rm9200-wdt"
> -
>  RAMC SDRAM/DDR Controller required properties:
>  - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
>  			"atmel,at91sam9260-sdramc",
> diff --git a/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> new file mode 100644
> index 000000000000..08ee459d9fa3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/atmel,at91rm9200-st.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel System Timer (ST)
> +
> +maintainers:
> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
> +  - Alexandre Belloni <alexandre.belloni@microchip.com>
> +  - Claudiu Beznea <claudiu.beznea@microchip.com>
> +
> +description:
> +  Atmel system timer integrates a period interval timer, a watchdog timer and a
> +  real-time timer.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: atmel,at91rm9200-st
> +          - const: syscon
> +          - const: simple-mfd
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description:
> +      Contain interrupt for the ST which is the IRQ line shared across all
> +      system controller members.
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  watchdog:
> +    $ref: ../watchdog/atmel,at91rm9200-wdt.yaml
> +    description:
> +      Child node describing watchdog.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/at91.h>
> +
> +    st: timer@fffffd00 {
> +        compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
> +        reg = <0xfffffd00 0x100>;
> +        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

This one is broken for the same reason too. Please test the bindings :(

Cheers,
Conor.

> +        clocks = <&slow_xtal>;
> +
> +        watchdog {
> +            compatible = "atmel,at91rm9200-wdt";
> +        };
> +    };
> +
> +...
> -- 
> 2.34.1
>
Rob Herring May 26, 2023, 1:43 a.m. UTC | #3
On Thu, 25 May 2023 15:55:58 +0300, Claudiu Beznea wrote:
> Convert Atmel PIT to YAML. Along with it clock binding has been added as
> the driver enables it to ensure proper hardware functionality.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  .../devicetree/bindings/arm/atmel-sysregs.txt |  6 ---
>  .../bindings/timer/atmel,at91sam9260-pit.yaml | 51 +++++++++++++++++++
>  2 files changed, 51 insertions(+), 6 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dts:29.29-30 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1512: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230525125602.640855-2-claudiu.beznea@microchip.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
Claudiu Beznea May 26, 2023, 4:45 a.m. UTC | #4
On 25.05.2023 20:10, Conor Dooley wrote:
> On Thu, May 25, 2023 at 03:55:58PM +0300, Claudiu Beznea wrote:
>> Convert Atmel PIT to YAML. Along with it clock binding has been added as
>> the driver enables it to ensure proper hardware functionality.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> ---
>>  .../devicetree/bindings/arm/atmel-sysregs.txt |  6 ---
>>  .../bindings/timer/atmel,at91sam9260-pit.yaml | 51 +++++++++++++++++++
>>  2 files changed, 51 insertions(+), 6 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> index 67a66bf74895..7024839c5da2 100644
>> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> @@ -4,12 +4,6 @@ Chipid required properties:
>>  - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>>  - reg : Should contain registers location and length
>>  
>> -PIT Timer required properties:
>> -- compatible: Should be "atmel,at91sam9260-pit"
>> -- reg: Should contain registers location and length
>> -- interrupts: Should contain interrupt for the PIT which is the IRQ line
>> -  shared across all System Controller members.
>> -
>>  PIT64B Timer required properties:
>>  - compatible: Should be "microchip,sam9x60-pit64b"
>>  - reg: Should contain registers location and length
>> diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>> new file mode 100644
>> index 000000000000..f304cd68acd5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
>> @@ -0,0 +1,51 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Atmel Periodic Interval Timer (PIT)
>> +
>> +maintainers:
>> +  - Claudiu Beznea <claudiu.beznea@microchip.com>
>> +
>> +description:
>> +  Atmel periodic interval timer provides the operating system’s scheduler
>> +  interrupt. It is designed to offer maximum accuracy and efficient management,
>> +  even for systems with long response time.
>> +
>> +properties:
>> +  compatible:
>> +    const: atmel,at91sam9260-pit
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    description:
>> +      Contain interrupt for the PIT which is the IRQ line shared across all
>> +      System Controller members.
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - clocks
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/at91.h>
>> +
>> +    pit: timer@fffffe40 {
>> +        compatible = "atmel,at91sam9260-pit";
>> +        reg = <0xfffffe40 0x10>;
>> +        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> make dt_binding_check W=1 -j 30 DT_SCHEMA_FILES=atmel,at91sam9260-pit.yaml
>   LINT    Documentation/devicetree/bindings
>   DTEX    Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dts
>   CHKDT   Documentation/devicetree/bindings/processed-schema.json
>   SCHEMA  Documentation/devicetree/bindings/processed-schema.json
>   DTC_CHK Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dtb
> Error: Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dts:26.29-30 syntax error
> FATAL ERROR: Unable to parse input tree
> make[1]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.example.dtb] Error 1
> make: *** [Makefile:1512: dt_binding_check] Error 2
> 
> Think you're missing the header for IRQ_TYPE_LEVEL_HIGH
> 

Well, I messed this series... I had the impression I've tested all these.
Sorry for the noise.
Conor Dooley May 26, 2023, 6:23 a.m. UTC | #5
Hey Claudiu,

On Fri, May 26, 2023 at 04:47:28AM +0000, Claudiu.Beznea@microchip.com wrote:
> On 25.05.2023 20:14, Conor Dooley wrote:
> >> Convert Microchip PIT64B to YAML. Along with it clock-names binding has
> >> been added as the driver needs it to get PIT64B clocks.
> > I don't think both of these PIT things need to have different binding
> > files. 90% of it is the same, just the clock-names/number - so you can
> 
> But these are different hardware blocks with different functionalities and
> different drivers.

Having different drivers doesn't preclude having them in the same
binding provided the function/description etc are more or less
identical. I was confused by:

+description:
+  The 64-bit periodic interval timer provides the operating system scheduler
+  interrupt. It is designed to offer maximum accuracy and efficient management,
+  even for systems with long response times.

+description:
+  Atmel periodic interval timer provides the operating system’s scheduler
+  interrupt. It is designed to offer maximum accuracy and efficient management,
+  even for systems with long response time.

Those seemed like they do the same thing to me!

Cheers,
Conor

> 
> > combine the two into one file with an
>
Conor Dooley May 26, 2023, 7:55 a.m. UTC | #6
On Fri, May 26, 2023 at 06:41:39AM +0000, Claudiu.Beznea@microchip.com wrote:
> On 26.05.2023 09:23, Conor Dooley wrote:
> > On Fri, May 26, 2023 at 04:47:28AM +0000, Claudiu.Beznea@microchip.com wrote:
> >> On 25.05.2023 20:14, Conor Dooley wrote:
> >>>> Convert Microchip PIT64B to YAML. Along with it clock-names binding has
> >>>> been added as the driver needs it to get PIT64B clocks.
> >>> I don't think both of these PIT things need to have different binding
> >>> files. 90% of it is the same, just the clock-names/number - so you can
> >>
> >> But these are different hardware blocks with different functionalities and
> >> different drivers.
> > 
> > Having different drivers doesn't preclude having them in the same
> > binding provided the function/description etc are more or less
> > identical. I was confused by:
> > 
> > +description:
> > +  The 64-bit periodic interval timer provides the operating system scheduler
> > +  interrupt. It is designed to offer maximum accuracy and efficient management,
> > +  even for systems with long response times.
> > 
> > +description:
> > +  Atmel periodic interval timer provides the operating system’s scheduler
> > +  interrupt. It is designed to offer maximum accuracy and efficient management,
> > +  even for systems with long response time.
> > 
> > Those seemed like they do the same thing to me!
> 
> They do the same thing, they are timers... But the way they do it (from
> hardware perspective) is totally different. With this would you still
> prefer to have them merged?

Yeah, one binding would be my preference.
Rob Herring June 8, 2023, 8:17 p.m. UTC | #7
On Fri, May 26, 2023 at 08:55:39AM +0100, Conor Dooley wrote:
> On Fri, May 26, 2023 at 06:41:39AM +0000, Claudiu.Beznea@microchip.com wrote:
> > On 26.05.2023 09:23, Conor Dooley wrote:
> > > On Fri, May 26, 2023 at 04:47:28AM +0000, Claudiu.Beznea@microchip.com wrote:
> > >> On 25.05.2023 20:14, Conor Dooley wrote:
> > >>>> Convert Microchip PIT64B to YAML. Along with it clock-names binding has
> > >>>> been added as the driver needs it to get PIT64B clocks.
> > >>> I don't think both of these PIT things need to have different binding
> > >>> files. 90% of it is the same, just the clock-names/number - so you can
> > >>
> > >> But these are different hardware blocks with different functionalities and
> > >> different drivers.
> > > 
> > > Having different drivers doesn't preclude having them in the same
> > > binding provided the function/description etc are more or less
> > > identical. I was confused by:
> > > 
> > > +description:
> > > +  The 64-bit periodic interval timer provides the operating system scheduler
> > > +  interrupt. It is designed to offer maximum accuracy and efficient management,
> > > +  even for systems with long response times.
> > > 
> > > +description:
> > > +  Atmel periodic interval timer provides the operating system’s scheduler
> > > +  interrupt. It is designed to offer maximum accuracy and efficient management,
> > > +  even for systems with long response time.
> > > 
> > > Those seemed like they do the same thing to me!
> > 
> > They do the same thing, they are timers... But the way they do it (from
> > hardware perspective) is totally different. With this would you still
> > prefer to have them merged?
> 
> Yeah, one binding would be my preference.

I'd probably just leave them separate if they're pretty much unrelated.

Rob