From patchwork Mon Oct 12 03:25:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shayne Chen X-Patchwork-Id: 269952 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAE37C433E7 for ; Mon, 12 Oct 2020 03:26:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9568F2076C for ; Mon, 12 Oct 2020 03:26:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Si6WkEj2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727216AbgJLD0g (ORCPT ); Sun, 11 Oct 2020 23:26:36 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54570 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727157AbgJLD0f (ORCPT ); Sun, 11 Oct 2020 23:26:35 -0400 X-UUID: cf09e9cf8070453980e45c223ade5ef9-20201012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=2TN7jVjMjbxZZhJmbSbjCMoCBxy54utpQMS3/Gy+B9A=; b=Si6WkEj2IPJWjZh+HBwTN/7+HqAHOKO35N7xTtLc0AqmAc9mbMUBtvhZ7iIjdR1IYPoKcUJXMbXLuK/yo5waK7FqXpRo/eW2L+lPGPF7Ol5vbHKizUNKmDcPpo+nS2e0DQRpmLBPN7I9385OEPSJPvcbDaC5oM7sVsBD811Xwxs=; X-UUID: cf09e9cf8070453980e45c223ade5ef9-20201012 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1491985267; Mon, 12 Oct 2020 11:26:31 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Oct 2020 11:26:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Oct 2020 11:26:28 +0800 From: Shayne Chen To: Felix Fietkau CC: linux-wireless , Lorenzo Bianconi , Ryder Lee , Evelyn Tsai , linux-mediatek , Shayne Chen Subject: [PATCH v2 09/10] mt76: mt7915: add support to set txpower in testmode Date: Mon, 12 Oct 2020 11:25:37 +0800 Message-ID: <20201012032538.21314-9-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201012032538.21314-1-shayne.chen@mediatek.com> References: <20201012032538.21314-1-shayne.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Support tx_power setting in testmode. Note that the tx power value of antenna 1-3 equal to antenna 0. Reviewed-by: Ryder Lee Signed-off-by: Shayne Chen --- .../wireless/mediatek/mt76/mt7915/testmode.c | 100 ++++++++++++++++++ 1 file changed, 100 insertions(+) -- 2.17.1 diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c index cc5ab98..339f47a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c @@ -6,6 +6,17 @@ #include "mcu.h" #include "testmode.h" +enum { + TM_CHANGED_TXPOWER, + + /* must be last */ + NUM_TM_CHANGED +}; + +static const u8 tm_change_map[] = { + [TM_CHANGED_TXPOWER] = MT76_TM_ATTR_TX_POWER, +}; + struct reg_band { u32 band[2]; }; @@ -33,6 +44,42 @@ static const struct reg_band reg_backup_list[] = { REG_BAND_IDX(ARB_DRNGR0, 1), }; +static int +mt7915_tm_set_tx_power(struct mt7915_phy *phy) +{ + struct mt7915_dev *dev = phy->dev; + struct mt76_phy *mphy = phy->mt76; + struct cfg80211_chan_def *chandef = &mphy->chandef; + int freq = chandef->center_freq1; + int ret; + struct { + u8 format_id; + u8 dbdc_idx; + s8 tx_power; + u8 ant_idx; /* Only 0 is valid */ + u8 center_chan; + u8 rsv[3]; + } __packed req = { + .format_id = 0xf, + .dbdc_idx = phy != &dev->phy, + .center_chan = ieee80211_frequency_to_channel(freq), + }; + u8 *tx_power = NULL; + + if (dev->mt76.test.state != MT76_TM_STATE_OFF) + tx_power = dev->mt76.test.tx_power; + + /* Tx power of the other antennas are the same as antenna 0 */ + if (tx_power && tx_power[0]) + req.tx_power = tx_power[0]; + + ret = mt76_mcu_send_msg(&dev->mt76, + MCU_EXT_CMD_TX_POWER_FEATURE_CTRL, + &req, sizeof(req), false); + + return ret; +} + static int mt7915_tm_mode_ctrl(struct mt7915_dev *dev, bool enable) { @@ -196,6 +243,13 @@ mt7915_tm_set_rx_frames(struct mt7915_dev *dev, bool en) mt7915_tm_set_trx(dev, &dev->phy, TM_MAC_RX_RXV, en); } +static void +mt7915_tm_update_params(struct mt7915_dev *dev, u32 changed) +{ + if (changed & BIT(TM_CHANGED_TXPOWER)) + mt7915_tm_set_tx_power(&dev->phy); +} + static int mt7915_tm_set_state(struct mt76_dev *mdev, enum mt76_testmode_state state) { @@ -216,6 +270,51 @@ mt7915_tm_set_state(struct mt76_dev *mdev, enum mt76_testmode_state state) else if (prev_state == MT76_TM_STATE_OFF || state == MT76_TM_STATE_OFF) mt7915_tm_init(dev); + if ((state == MT76_TM_STATE_IDLE && + prev_state == MT76_TM_STATE_OFF) || + (state == MT76_TM_STATE_OFF && + prev_state == MT76_TM_STATE_IDLE)) { + u32 changed = 0; + int i; + + for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) { + u16 cur = tm_change_map[i]; + + if (td->param_set[cur / 32] & BIT(cur % 32)) + changed |= BIT(i); + } + + mt7915_tm_update_params(dev, changed); + } + + return 0; +} + +static int +mt7915_tm_set_params(struct mt76_dev *mdev, struct nlattr **tb, + enum mt76_testmode_state new_state) +{ + struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); + struct mt76_testmode_data *td = &dev->mt76.test; + u32 changed = 0; + int i; + + BUILD_BUG_ON(NUM_TM_CHANGED >= 32); + + if (new_state == MT76_TM_STATE_OFF || + td->state == MT76_TM_STATE_OFF) + return 0; + + if (td->tx_antenna_mask & ~dev->phy.chainmask) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) { + if (tb[tm_change_map[i]]) + changed |= BIT(i); + } + + mt7915_tm_update_params(dev, changed); + return 0; } @@ -273,5 +372,6 @@ mt7915_tm_dump_stats(struct mt76_dev *mdev, struct sk_buff *msg) const struct mt76_testmode_ops mt7915_testmode_ops = { .set_state = mt7915_tm_set_state, + .set_params = mt7915_tm_set_params, .dump_stats = mt7915_tm_dump_stats, };