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[0/9] hisi_sas: Some misc patches

Message ID 1531923273-193768-1-git-send-email-john.garry@huawei.com
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Series hisi_sas: Some misc patches | expand

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John Garry July 18, 2018, 2:14 p.m. UTC 
This patchset introduces some misc patches, generally more minor in
importance.

However there is a patch to add a CPU barrier to the delivery path for
each hw version. We only saw this issue on v3 hw in hip08 chipset, where
the host CPU exhibits a looser memory model than in predecessors, and
software must enforce SMP coherency.

John Garry (1):
  scsi: hisi_sas: Drop hisi_sas_slot_abort()

Xiang Chen (2):
  scsi: hisi_sas: Tidy hisi_sas_task_prep()
  scsi: hisi_sas: Add SATA FIS check for v3 hw

Xiaofei Tan (6):
  scsi: hisi_sas: tidy channel interrupt handler for v3 hw
  scsi: hisi_sas: Fix the failure of recovering PHY from STP link
    timeout
  scsi: hisi_sas: tidy host controller reset function a bit
  scsi: hisi_sas: relocate some common code for v3 hw
  scsi: hisi_sas: Implement handlers of PCIe FLR for v3 hw
  scsi: hisi_sas: add memory barrier in task delivery function

 drivers/scsi/hisi_sas/hisi_sas.h       |   4 +-
 drivers/scsi/hisi_sas/hisi_sas_main.c  | 113 ++++++--------
 drivers/scsi/hisi_sas/hisi_sas_v1_hw.c |  20 +--
 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c |  18 ++-
 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 274 ++++++++++++++++++++-------------
 5 files changed, 239 insertions(+), 190 deletions(-)

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1.9.1