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[209.132.180.67]) by mx.google.com with ESMTP id f187si7277483pgc.568.2017.08.21.09.08.35; Mon, 21 Aug 2017 09:08:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=VzIsbjQS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754406AbdHUQGp (ORCPT + 26 others); Mon, 21 Aug 2017 12:06:45 -0400 Received: from mail-wr0-f182.google.com ([209.85.128.182]:34658 "EHLO mail-wr0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753971AbdHUQGl (ORCPT ); Mon, 21 Aug 2017 12:06:41 -0400 Received: by mail-wr0-f182.google.com with SMTP id p14so34533910wrg.1 for ; Mon, 21 Aug 2017 09:06:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=rS8rtw9fhs+cuogCygEIfSVUoilaBH2sWivrQOhidWU=; b=VzIsbjQSc7aSNROQAewDfE24cmOEWs/NOooAJpMvee6ayF3++2eCAnTWEikkWu4dRL jRHpHQLV4Z6ulsSv0S7WkQVuq6Jj7tkN0FJtimMs8bMt2SRCCBIEa1hUBSwd6qM5uwqp KHw+iValFGIVU6JC+z33b8yD/+qiTFsm1sNVTYn2qXwHE4os1sFZOPY97OycUiCN0jgM TCX5xW+MknHbTZupMEbJNkoD+w9MPQ9hU4Y18dqnLll/JMTPUI0R3r56AJuWPL1kSX6e 5D3AYqhgBxUnVXFaSkTtpzJPFIX5wJ/5l17cSKmKBxHWpP1VawnR6HTWk/zX0BKgewtM cTMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rS8rtw9fhs+cuogCygEIfSVUoilaBH2sWivrQOhidWU=; b=i/KopRPatm55hHLUwKnq4WbI+MHrsY6cuJz9Tu1jvdIYdvpwHa/2rn4TcFjHMmvxwV wZSAYhZs83Xhl29frPv+G4asqkVqJ340Se1sgbLOobRQWNTgCOHHSazoHrhDILqpgaYV 7vC5fL7rW5Lg3hOaoQFfdAwj5+dVlHra8txf7AIRtduuymJHZT3LNplksRlubhiQnv+o 1d9/wV+FFKEJtQuOWVZjpoW2NVtALd5Wwa1X/p4O+VKGCnOrp4rLPwIPpR4+86tGqngF t4/bXiy5K+/otoyf84NpMTIKwk3G1KarwZYn1oGbPuLcf8dYeeQoLPFP3p77TjtrrHHW LyDg== X-Gm-Message-State: AHYfb5huNRcr0PuXh7Bi0v04TCGjfD3WFDu22vtn19u5FEQ1rvQ2PxE1 6/NHHz3cZFV+q0Ff X-Received: by 10.28.137.132 with SMTP id l126mr4798483wmd.122.1503331600633; Mon, 21 Aug 2017 09:06:40 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:40 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/9] ARM64: dts: meson: update around mmc Date: Mon, 21 Aug 2017 18:06:28 +0200 Message-Id: <20170821160637.22456-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset feature updates around mmc. It is linked to this series [0] but does not strictly depends on it. It adds: * The regulator settling times for the gpio regulator of nanopi-k2 and the libretech-cc. * UHS modes for the p20x and nanopi-k2. * clk-gate pins: these are the pinmuxes used for the clk-stop work around explained here [1] It also removes cap-sd-highspeed from eMMC nodes. Special note on SDR104: While the PCB of the p200 and the libretech-cc does not seems to handle SDR104 completely, the nanopi-k2 seems to be handling it correctly. The patch enabling this mode on the nanopi-k2 is the last one of this series. It should propabably be left out until more people can test sdr104 on the nanopi-k2 This series has been tested on the gxbb-200, the gxbb-nanopi-k2 and the gxl-s905x-libretech-cc Changes since v1 [2]: * Reorder patches to put fixes first, then enhancements * Fix error in the SDIO clk_gate pins (GPIOX_5 instead GPIOX_4) [0]: https://lkml.kernel.org/r/20170821160301.21899-1-jbrunet@baylibre.com [1]: https://lkml.kernel.org/r/20170821160301.21899-11-jbrunet@baylibre.com [2]: https://lkml.kernel.org/r/20170804180816.18737-1-jbrunet@baylibre.com Jerome Brunet (9): ARM64: dts: meson-gx: Use correct mmc clock source 0 ARM64: dts: meson: remove cap-sd-highspeed from emmc nodes ARM64: dts: meson: add mmc clk gate pins ARM64: dts: meson-gxbb: nanopi-k2: add card regulator settle times ARM64: dts: meson-gxl: libretech-cc: add card regulator settle times ARM64: dts: meson-gxl: libretech-cc: remove sdr104 capability ARM64: dts: meson-gxbb: p20x: enable sdcard UHS modes ARM64: dts: meson-gxbb: nanopi-k2: enable sdcard UHS modes ARM64: dts: meson-gxbb: nanopi-k2: enable sdr104 mode .../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 10 +++--- .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 19 ++++++++--- .../boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 12 ++++--- .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 9 ++--- arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 13 +++++--- .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 10 +++--- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 39 ++++++++++++++++++++-- .../dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 7 ++-- .../dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 10 ++++-- .../dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 10 +++--- .../boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 10 +++--- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 39 ++++++++++++++++++++-- .../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 7 ++-- arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 1 - 14 files changed, 146 insertions(+), 50 deletions(-) -- 2.9.5