From patchwork Tue Sep 19 18:47:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 113059 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp5261104qgf; Tue, 19 Sep 2017 11:50:06 -0700 (PDT) X-Google-Smtp-Source: AOwi7QA4YXTYAhCB1Oz/ZdzyvmnEBOuRKcuDx4hTpiWimaKv2eMr+Zu+ZZBBieGiV1acTAR2MdG8 X-Received: by 10.101.86.133 with SMTP id v5mr2232963pgs.249.1505847006699; Tue, 19 Sep 2017 11:50:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505847006; cv=none; d=google.com; s=arc-20160816; b=petZ0jxaXDi3zhFlhcJvuaOzqsY0yhrejfasGtZU7q3dxzkVch9Vg+wDN8csXGBysq D50qM06mIgLX5Y2EVXGy9qfFKr0uOfSFm6uSxNlAWxHc7X3PzQCBpyjA5V1JhtVI7IMa IsMMiDyJXUAWGDU7+z7+ibivYFvTNthgCtGW1InnAvD42cfA4jGNyCmxTJ/y06nKRXND hdrUc6ogOtFwWYq6DfBjG9DFs3OpQSbbXB7/acudRq940XImIKvSw89WtDJgzgfzcd/u c8PQJCCXwD4eVKsoXALYfKhCOgWtAycpuCz0zvMiEXMS4t8/X+HeLwTDtjOEi1kt13hE goDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=NwGk3Tg1x+xNdI6mmJco8eiMe0HzFy/YYk2/GDcnsQY=; b=MDp+1ul/Rhmty6M+NLlEq/toId+w7MGkeJOa7vFu6OdY9F8afvMJGu+4Yhdzunsw7Y /ll6ulEkpBCooAm34YLG1hdwC4Ws+OOvreIkoNow8oA7H09vZv10r+cVfwYEmXqaPP0w kV0N8LOuS95I85Qz36IUl7uwYKjcgXCRVku1fpqhUldmmcHWstddNQnaDLii96bmShWi tZ6ahDl9gZVOZXreqSnSIhgGh8g/QcF3oB9cMQjL1/3L0q2yfFJHmylGBmNdTET/rKF2 76LEsLUsEw9V3haRaRX50RGkXvo7mMr/CrKiArLM1Mp3+Wzb9EWCjd2IzXAf2riIJrrj mdNg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 84si1731003pgb.638.2017.09.19.11.50.06; Tue, 19 Sep 2017 11:50:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751885AbdISSuE (ORCPT + 26 others); Tue, 19 Sep 2017 14:50:04 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53992 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751473AbdISSsH (ORCPT ); Tue, 19 Sep 2017 14:48:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 80AB415A2; Tue, 19 Sep 2017 11:48:06 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3F41B3F483; Tue, 19 Sep 2017 11:48:05 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, mturquette@baylibre.com, sboyd@codeaurora.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jeremy Linton Subject: [PATCH v2 0/6] Support PPTT for ARM64 Date: Tue, 19 Sep 2017 13:47:45 -0500 Message-Id: <20170919184751.25110-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ACPI 6.2 adds the Processor Properties Topology Table (PPTT), which is used to describe the processor and cache topology. Ideally it is used to extend/override information provided by the hardware, but right now ARM64 is entirely dependent on firmware provided tables. This patch parses the table for the cache topology and CPU topology. For the latter we also add an additional topology_cod_id() macro, and a package_id for arm64. Initially the physical id will match the cluster id, but we update users of the cluster to utilize the new macro. When we enable ACPI/PPTT for arm64 we map the socket to the physical id as the remainder of the kernel expects. For example on juno: [root@mammon-juno-rh topology]# lstopo-no-graphics Package L#0 L2 L#0 (1024KB) L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0) L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1) L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2) L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3) L2 L#1 (2048KB) L1d L#4 (32KB) + L1i L#4 (48KB) + Core L#4 + PU L#4 (P#4) L1d L#5 (32KB) + L1i L#5 (48KB) + Core L#5 + PU L#5 (P#5) HostBridge L#0 PCIBridge PCIBridge PCIBridge PCI 1095:3132 Block(Disk) L#0 "sda" PCIBridge PCI 1002:68f9 GPU L#1 "renderD128" GPU L#2 "card0" GPU L#3 "controlD64" PCIBridge PCI 11ab:4380 Net L#4 "enp8s0" v1->v2: The parser keys off the acpi_pptt_processor node to determine unique cache's rather than the acpi_pptt_cache referenced by the processor node. This allows PPTT tables which "share" cache nodes across cpu nodes despite not being a shared cache. Normalize the socket, cluster and thread mapping so that they match linux's traditional mapping for the physical id, and thread id. Adding explicit scheduler knowledge of clusters (rather than just their cache sharing attributes) is a subject for a future patch. Jeremy Linton (6): ACPI/PPTT: Add Processor Properties Topology Table parsing ACPI: Enable PPTT support on ARM64 drivers: base: cacheinfo: arm64: Add support for ACPI based firmware tables Topology: Add cluster on die macros and arm64 decoding arm64: Fixup users of topology_physical_package_id arm64: topology: Enable ACPI/PPTT based CPU topology. arch/arm64/Kconfig | 1 + arch/arm64/include/asm/topology.h | 4 +- arch/arm64/kernel/cacheinfo.c | 23 +- arch/arm64/kernel/topology.c | 62 ++++- drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/pptt.c | 459 ++++++++++++++++++++++++++++++++++++++ drivers/base/cacheinfo.c | 17 +- drivers/clk/clk-mb86s7x.c | 2 +- drivers/cpufreq/arm_big_little.c | 2 +- drivers/firmware/psci_checker.c | 2 +- include/linux/cacheinfo.h | 10 +- include/linux/topology.h | 4 + 13 files changed, 570 insertions(+), 20 deletions(-) create mode 100644 drivers/acpi/pptt.c -- 2.13.5