From patchwork Mon Feb 12 14:58:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 128125 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3287547ljc; Mon, 12 Feb 2018 06:59:01 -0800 (PST) X-Google-Smtp-Source: AH8x224i7Oswm4d5QhvZKiM38MfwlFKNaHwqKZYhLqovTJdFdzTp01DVsDCmDzpAMv7ngpxkoxAo X-Received: by 10.98.211.218 with SMTP id z87mr11975545pfk.54.1518447541709; Mon, 12 Feb 2018 06:59:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518447541; cv=none; d=google.com; s=arc-20160816; b=Jb62zopSCWxIB9z9TamA2XxZfIr24SJm8UYRFzLvjPob8exCcuK1IRfwHaOCuhiNTo HCVgRI10Z7CWLBHjXLV496QRMref388jM4CrUv0p7Iz0x5uEoFSKxZrrSBxWkeDuUq0G c4Vjd87bGttqG4n3gcxufXO82AAMVLCvVFGJ21oLSt21aQZZ9t1WzMqk+7Yecu+h6auM wRmp/r8lEGmWWVGvRrWyIDl7Cv5R+h+7R0EdquTR/ZGSMdVahYYMwipfc+wU6h/hm72P OVXLOG0UlWiWmh3S8Wn+id7eixrZBbXxCmyx0fNEnzaUG3QDMa8SBywy7jYODWhYNrul s7xA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=3LPVVTVh4fTeVn3yCYjMAffYMhIBMZMsynZwJ8VR3k0=; b=O6nH20z7a+j532Vqwsr2teav9G0UhOS2k8VgJOswrdqp1WNT6A/QaXEvT0dJexDPSK 0FNfTO+eFeZ6mnUxQq5l+jGGfFh5b1b9yYrd0QLmO5oHHzcqNnzKODBc1xTAfPCq6UwJ WGeTkcERS+mydZFIaIYy3mppSE2WtIJU6H0ZLOVsL74Xh2CNki8Grsqbj8z5Snox7ch8 6OwMG9NNOn3fUfTl9nteoUbZalDZNHlJFTUKPdK7c6jM5k5c3asmz2Yfgj/cYsMWI5tq EpCaP3BOsY7ib1cri8nSNip/0elF0W5K8v90Ymq9fUBCfqy7fVyKkNeF3Z/1Wdo3DRHY 1Zrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=XV8mggze; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 3-v6si3983008plz.209.2018.02.12.06.59.01; Mon, 12 Feb 2018 06:59:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=XV8mggze; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932312AbeBLO6z (ORCPT + 15 others); Mon, 12 Feb 2018 09:58:55 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:36036 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932246AbeBLO6v (ORCPT ); Mon, 12 Feb 2018 09:58:51 -0500 Received: by mail-wm0-f65.google.com with SMTP id f3so10477140wmc.1 for ; Mon, 12 Feb 2018 06:58:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=3LPVVTVh4fTeVn3yCYjMAffYMhIBMZMsynZwJ8VR3k0=; b=XV8mggzebUGFnCPVVc4qy4vqMDnaAo0hdZJla4dyTWg7hrKL9Y6MIOhIwZYrsJpKn5 BtcyNgFmbFaWU4zJ+ZBJ+rjj6JEPIhwulU4Y0OZ14q+t+C+cb1HY0OgpIghfVMSUTIOD sDYXzWMwSkyR2kCbB99hdwKMh2NRlY3eAImez3TfJMga9uzmHT/OAyF6t1vopSDwewq5 Z793m88XBXwnumsVJOyKJH8rIbA2LBuK0xssKGikhD94Qw5SIAY3JklPvdZ/BsHPXxTW pbV6RgHDawBKgSm9+lHKY8PrjA79aZpldRs7bcTm26o6WNRZBgqXXPstbbYk/bIeqydR Xlqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=3LPVVTVh4fTeVn3yCYjMAffYMhIBMZMsynZwJ8VR3k0=; b=sci4Hst+JCfvp3FhDDd9+/BbLQaSDIN57udh/BeBPi539qkLIrXrQPZHNK0M/Qqjn4 KBI28y8fKHoK2SABp9IYrokJmdhTKfSVB+hmf//6Ktvq7oV39BATSjYWqYv9Imv2u4Vz juUYjRso/OgeQGWDzDkj2uhRL8RXa6xtRHYH4eL9bp5J0MsBwHNlaZUZ25quoGOS2I/b gqOo3iBSvwGx3eaR6J4SaE/OvY0hD1Cr8JW1Il2+l1OBTtzZSoA1XcE5R1+di5UgiNDT 3DeOF2JUylMJUcNUI0hMoWgDckQVrecORDujP+vvlvKaEwtwFCRK/1418kqGrqOhuyS8 pt5w== X-Gm-Message-State: APf1xPBcg5Bxj6Izs6Z0PWIvK5/kLWIJw7006LXbqiw+UIn9RdRnOIok 9fHMgdZ/rTfFNdyMOtieHHgHog== X-Received: by 10.28.109.10 with SMTP id i10mr4199655wmc.107.1518447530273; Mon, 12 Feb 2018 06:58:50 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p21sm4633218wmc.28.2018.02.12.06.58.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Feb 2018 06:58:49 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 00/19] clk: meson: use regmap in clock controllers Date: Mon, 12 Feb 2018 15:58:27 +0100 Message-Id: <20180212145846.19380-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This changeset is a rework of meson's clock controllers to use regmap instead of directly using io memory. It based clk-meson next/drivers and depends on few core clock patches, mainly to export generic clocks helpers: [0],[1]. The line count is pretty high but the changes are actually fairly simple and repetitive. This work has been triggered by the fact that the HHI register space on gxbb and axg provides more than just clocks. The display driver already uses a syscon for HHI on gxbb. This is why gxbb did not use devm_ioremap_resource() to map the registers, since it would have reserved the memory region, preventing another driver from re-mapping it. The cleaner solution is, of course, to use syscon to handle. The purpose of this changeset is to allow it. Even if meson8b does not need this ATM, there is real reason to leave it behind. It is actually easier to migrate it as well, so all meson clock drivers may support regmap only. The rework starts with a few easy clean-ups. The real deal starts with patch 5, which adds meson's clk_regmap. This will be used as common structure to implement all the controller clocks. Having this replaces the gxbb AO controller specific regmap gate. This structure will also be re-used in upcoming controllers, such as the axg's AO and audio controllers. Each clock type is then migrated, one at a time, to this new structure. While at it, the meson clock drivers have been cleaned-up a bit, removing the gate embedded in the mpll driver, simplifying the pll driver and removing the legacy cpu_clk of meson8b. The new code around the cpu clk of the meson8b is just re-implementation, using simple elements, of the old cpu_clk. As explained by Martin, the old cpu_clk would hang quite often when changing the rate of the cpu clock. Surprisingly, the new implementation improved the situation a bit, but still hangs from time to time. As this is not acceptable, the cpu clk subtree as been switched to a read-only mode, preventing any change of the cpu rate, until an acceptable solution is found. With this series applied, the clock controllers of the gxbb, gxl and axg SoC will try get regmap from their parent DT node. If this fails, they will fallback to mapping the register themselves. This fallback will be kept until platform DTs have changed so clock controllers is a child of the HHI system controller. Based on this changeset, more patches are coming. For those interested, the WIP is available here [2] Changes since v1 [3]: * Fixed a few typos in patches descriptions * Fixed cpu clock names on meson8b, as suggested by Martin * Switched cpu clock subtree to reead-only mode * Fix clk_regmap mux documentation, as reported by Yixun [0]: https://lkml.kernel.org/r/20180118110144.30619-1-jbrunet@baylibre.com [1]: https://lkml.kernel.org/r/20180122105759.12206-1-jbrunet@baylibre.com [2]: https://github.com/jeromebrunet/linux/tree/v4.17/meson/clk-regmap [1]: https://lkml.kernel.org/r/20180131180945.18025-1-jbrunet@baylibre.com Jerome Brunet (19): clk: meson: use dev pointer where possible clk: meson: use devm_of_clk_add_hw_provider clk: meson: only one loop index is necessary in probe clk: meson: remove obsolete comments clk: meson: add regmap clocks clk: meson: switch gxbb ao_clk to clk_regmap clk: meson: remove superseded aoclk_gate_regmap clk: meson: add regmap to the clock controllers clk: meson: migrate gates to clk_regmap clk: meson: migrate dividers to clk_regmap clk: meson: migrate muxes to clk_regmap clk: meson: add regmap helpers for parm clk: meson: migrate mplls clocks to clk_regmap clk: meson: migrate the audio divider clock to clk_regmap clk: meson: migrate plls clocks to clk_regmap clk: meson: split divider and gate part of mpll clk: meson: rework meson8b cpu clock clk: meson: remove obsolete cpu_clk clk: meson: use hhi syscon if available drivers/clk/meson/Kconfig | 9 + drivers/clk/meson/Makefile | 5 +- drivers/clk/meson/axg.c | 722 +++++++++-------- drivers/clk/meson/axg.h | 6 +- drivers/clk/meson/clk-audio-divider.c | 63 +- drivers/clk/meson/clk-cpu.c | 178 ----- drivers/clk/meson/clk-mpll.c | 132 +--- drivers/clk/meson/clk-pll.c | 243 +++--- drivers/clk/meson/clk-regmap.c | 166 ++++ drivers/clk/meson/clk-regmap.h | 111 +++ drivers/clk/meson/clkc.h | 93 +-- drivers/clk/meson/gxbb-aoclk-regmap.c | 46 -- drivers/clk/meson/gxbb-aoclk.c | 20 +- drivers/clk/meson/gxbb-aoclk.h | 11 - drivers/clk/meson/gxbb.c | 1402 ++++++++++++++++++--------------- drivers/clk/meson/gxbb.h | 5 +- drivers/clk/meson/meson8b.c | 588 ++++++++------ drivers/clk/meson/meson8b.h | 11 +- 18 files changed, 1978 insertions(+), 1833 deletions(-) delete mode 100644 drivers/clk/meson/clk-cpu.c create mode 100644 drivers/clk/meson/clk-regmap.c create mode 100644 drivers/clk/meson/clk-regmap.h delete mode 100644 drivers/clk/meson/gxbb-aoclk-regmap.c -- 2.14.3