From patchwork Tue Jan 9 10:09:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 123849 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp266352edr; Tue, 9 Jan 2018 02:09:57 -0800 (PST) X-Google-Smtp-Source: ACJfBosw+HbOxsY15Xv9cuibKAFVkZ2mUwuVkiyYHPJU37GtSp5bpIYf/C1IKhIm8IyvkFadkBpR X-Received: by 10.99.163.26 with SMTP id s26mr11637505pge.402.1515492596959; Tue, 09 Jan 2018 02:09:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515492596; cv=none; d=google.com; s=arc-20160816; b=IAqYolBxXHz76B+kc7uQudkvILGj01AM26Z3KXOe3qhMwt02orZXZigR5Db04J8VqQ AIPBgFmcijyXhIwQqTylBC9jyBSxBB6YsTJEuQcS9YP/QnBIZ5MHFBlMl1h7P+k19tPT iqfYK3n866ZrZrs3pMpMyh2ytanTb4TjjRVSHi02FyEQAUL6Qmb+zr0pzYOK2Go6IJ0D aSbewOAgIJy7sQuhaRnzvacEzC4P067mO/o8HqD6TigpaJmSdZrjRPmPJO3m631RaF+0 ECOdyEB+3kHVdop2ORsN6hv0b0QVu8kR1qErV0aN+GHoQ6kGADTZxY6D2DiSRIc1PABS AJKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=FzTsSw8wiNOCmUFILmbiRR5x1Ge+/09H9ONk2N8GjyI=; b=k4mNQCWu0N6Nk8d8yDQaxER+lHWjU2UZHZNZxRqVpFcsriSZ0/Xuw9Fkw6lQJvrwR+ dAcnBGxptJolQSf9mz3VtNPUnusEkmbdFfHlEOUm5eWUQxmI7EpqcnXFcdQr76CT6DsK 5pUTXbeb3xdcNVAcbPTu4ZlHIlksD6Ajwz4ELuwwiBWaS27NjwWX3hArEL9GLP7Pfpfu 10rn7RyE16hdSsmhoEhoKaos/XYlIxOMuvj2ZpSzekLGugOHARaiuYsivyp1vRB99xMm IdN+pBvOwLh3vJnSl7o30MdBvklH0NpVwl3MTs7CshJtJhwgKjbRf9OxAc3ZNXvqMvZQ gYtw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o28si8757083pgn.314.2018.01.09.02.09.56; Tue, 09 Jan 2018 02:09:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753725AbeAIKJz (ORCPT + 28 others); Tue, 9 Jan 2018 05:09:55 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:48396 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751374AbeAIKJk (ORCPT ); Tue, 9 Jan 2018 05:09:40 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 36AC02082B; Tue, 9 Jan 2018 11:09:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 073F02037A; Tue, 9 Jan 2018 11:09:28 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , narmstrong@baylibre.com, thomas@vitsch.nl Subject: [PATCH v3 00/13] drm/sun4i: Support the Display Engine frontend Date: Tue, 9 Jan 2018 11:09:13 +0100 Message-Id: X-Mailer: git-send-email 2.14.3 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This is a first serie to enable the display engine frontend. This hardware block is found in the first generation Display Engine from Allwinner. Its role is to implement more advanced features that the associated backend, even though the backend alone can be used (and was used so far) for basic composition. Among those features, we will find hardware scaling, that is supported in this serie, colorspace conversions, or more exotic formats support such as the one output by the VPU. Let me know what you think, Maxime Changes from v2: - Substracted PHYS_OFFSET to the buffer address - Make sure we only probe and add to the component list on frontends that are supported, and not simply the one enabled in the DTs - Reset the device at probe, and deassert the line after the clocks are enabled - Fixed the format value used - Used drm_fb_cma_get_gem_addr - Added a define for the COEF_ACCESS_CTRL bit - Fixed a wrong comment - Kept the ordering of the engine ops - Reapplied the NULL plane pointer patch that got squashed in v2 somehow - s/backend/engine/ in the engine_ops documentation Changes from v1: - Fixed the unbind function to not disable the already disabled clocks, and to remove ourself from the frontend list - Changed the log level of the frontend disabled message - Added blank lines where suggested by Neil - Fixed an artifact that was happening when the plane using the frontend was disabled. This was happening because the frontend was disabled before the backend layer (that would be disabled at the next vblank). This led to a significant rework of the patches, so I didn't apply all the tags. I also had to take a few patches in. - Added engine ops documentation - Fixed a bug in our duplicate_state callback that wouldn't preserve the frontend state - Removed the hardcoded register values and used the real ones instead. - Fixed some compilation errors reported by the 0-day bot. Maxime Ripard (13): drm/sun4i: backend: Move line stride setup to buffer setup function drm/sun4i: backend: Document the engine operations drm/sun4i: backend: Allow a NULL plane pointer to retrieve the format drm/sun4i: backend: Add a custom plane state drm/sun4i: engine: Add a custom crtc atomic_check drm/sun4i: engine: Add a VBLANK quirk callback drm/sun4i: engine: Create an atomic_begin callback drm/sun4i: Add a driver for the display frontend drm/sun4i: backend: Wire in the frontend drm/sun4i: backend: Add a custom atomic_check for the frontend drm/sun4i: backend: Use runtime_pm variant of atomic_commit_tail drm/sun4i: backend: Make sure we don't have a commit pending ARM: dts: sun8i: a33 Enable our display frontend arch/arm/boot/dts/sun8i-a33.dtsi | 1 +- drivers/gpu/drm/sun4i/Makefile | 3 +- drivers/gpu/drm/sun4i/sun4i_backend.c | 183 ++++++++++- drivers/gpu/drm/sun4i/sun4i_backend.h | 10 +- drivers/gpu/drm/sun4i/sun4i_crtc.c | 21 +- drivers/gpu/drm/sun4i/sun4i_drv.c | 27 +- drivers/gpu/drm/sun4i/sun4i_drv.h | 1 +- drivers/gpu/drm/sun4i/sun4i_framebuffer.c | 6 +- drivers/gpu/drm/sun4i/sun4i_frontend.c | 384 +++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_frontend.h | 99 ++++++- drivers/gpu/drm/sun4i/sun4i_layer.c | 83 ++++- drivers/gpu/drm/sun4i/sun4i_layer.h | 11 +- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 +- drivers/gpu/drm/sun4i/sunxi_engine.h | 89 +++++- 14 files changed, 901 insertions(+), 21 deletions(-) create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.h base-commit: f2e323798ce2553a10ddc720879553642e05e619 -- git-series 0.9.1