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[209.132.180.67]) by mx.google.com with ESMTP id p1-v6si23701773plb.204.2018.05.25.03.33.00; Fri, 25 May 2018 03:33:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aUjijDtA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966389AbeEYKc6 (ORCPT + 30 others); Fri, 25 May 2018 06:32:58 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:40860 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966261AbeEYKcs (ORCPT ); Fri, 25 May 2018 06:32:48 -0400 Received: by mail-pg0-f68.google.com with SMTP id l2-v6so2128668pgc.7 for ; Fri, 25 May 2018 03:32:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=oxDacl2OIDr7Nd409LauBugaXeD2W+E2eVDckohi0ks=; b=aUjijDtAWzLuCraf/W+u9hdAiXBJCGzHqYrbYBigOHcpOdOVz7d7vx5/o6SgESDQ0A jtES9fyNgy9vWG+Z5yW7OFFGWSqm1rVOePFI51XlAaWtMIkBIpkmiFERvWLksBe0DWHJ uH71VxUreFLM7ibCJrlXWJr6zSvraZzFyiMZA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oxDacl2OIDr7Nd409LauBugaXeD2W+E2eVDckohi0ks=; b=MmPWmlISIuHvu8s2y1Xr+zPho1uSPR6GmmbIEI2iPHSsUMsgzBoYz/vYrKhdkp0RWq xHYIZ96VprznquVB7lp2v0hKQ591A3iFHIgaALzqrB/FrcNdQOpXJ8TaPCdmDLzbepEi dOcN/etO3mf1c8sUC/ryxfzg/vQOztmKNXz9udurgntSBfwmgAclLnYB0VOfxucaXqe9 muJ1ztJEZJowJRCVBUyzMc7QhEgXdVjBjEw7t7nz8vTaW0E76NRsMPzcYROoqf71S3Ul wIhVRxjWD1uxzkUa0nUYRDO89W+oxZ7YUhpUJ6aR63IGXaUOrsNRqUzWSXAlXTJ6iVFZ 8/oA== X-Gm-Message-State: ALKqPwe6L1M43PeFpEloYlIBs15ZDX6YFQ2CXXAztpjAKlyTgANVZcEd Vynikw+jJrDF3DZNCYhC69EljbBqMFQ= X-Received: by 2002:a63:7255:: with SMTP id c21-v6mr623450pgn.99.1527244368051; Fri, 25 May 2018 03:32:48 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id l23-v6sm11414149pgc.61.2018.05.25.03.32.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:47 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Heiko Stuebner , Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/15] arm: dts: rk3288: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 16:01:56 +0530 Message-Id: <11f16618dc965a7996976a2bca040cd87d1961d2.1527244201.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, OPP, clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/rk3288.dtsi | 54 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d7e49d29ace5..752a892847dd 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -122,18 +122,72 @@ compatible = "arm,cortex-a12"; reg = <0x501>; resets = <&cru SRST_CORE1>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu2: cpu@502 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x502>; resets = <&cru SRST_CORE2>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu3: cpu@503 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x503>; resets = <&cru SRST_CORE3>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; };