From patchwork Tue Sep 6 18:00:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul E. McKenney" X-Patchwork-Id: 3898 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 951A723FB4 for ; Wed, 7 Sep 2011 06:20:40 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 8E88EA186A5 for ; Wed, 7 Sep 2011 06:20:38 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id 18so398726fxd.11 for ; Tue, 06 Sep 2011 23:20:38 -0700 (PDT) Received: by 10.223.76.201 with SMTP id d9mr1584869fak.119.1315376438483; Tue, 06 Sep 2011 23:20:38 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.11.8 with SMTP id m8cs127757lab; Tue, 6 Sep 2011 23:20:38 -0700 (PDT) Received: by 10.91.126.13 with SMTP id d13mr4524769agn.19.1315376437347; Tue, 06 Sep 2011 23:20:37 -0700 (PDT) Received: from e3.ny.us.ibm.com (e3.ny.us.ibm.com [32.97.182.143]) by mx.google.com with ESMTPS id g13si5502003ann.49.2011.09.06.23.20.35 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Sep 2011 23:20:36 -0700 (PDT) Received-SPF: pass (google.com: domain of paulmck@linux.vnet.ibm.com designates 32.97.182.143 as permitted sender) client-ip=32.97.182.143; Authentication-Results: mx.google.com; spf=pass (google.com: domain of paulmck@linux.vnet.ibm.com designates 32.97.182.143 as permitted sender) smtp.mail=paulmck@linux.vnet.ibm.com Received: from d01relay01.pok.ibm.com (d01relay01.pok.ibm.com [9.56.227.233]) by e3.ny.us.ibm.com (8.14.4/8.13.1) with ESMTP id p875tlg0022511 for ; Wed, 7 Sep 2011 01:55:47 -0400 Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by d01relay01.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p876KY4C187094 for ; Wed, 7 Sep 2011 02:20:34 -0400 Received: from d01av01.pok.ibm.com (loopback [127.0.0.1]) by d01av01.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p876KWHu004400 for ; Wed, 7 Sep 2011 02:20:34 -0400 Received: from paulmck-ThinkPad-W500 (dyn9050016039.mts.ibm.com [9.50.16.39] (may be forged)) by d01av01.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p876KRHf004231; Wed, 7 Sep 2011 02:20:30 -0400 Received: by paulmck-ThinkPad-W500 (Postfix, from userid 1000) id 39DF213F898; Tue, 6 Sep 2011 11:00:53 -0700 (PDT) From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org Cc: mingo@elte.hu, laijs@cn.fujitsu.com, dipankar@in.ibm.com, akpm@linux-foundation.org, mathieu.desnoyers@polymtl.ca, josh@joshtriplett.org, niv@us.ibm.com, tglx@linutronix.de, peterz@infradead.org, rostedt@goodmis.org, Valdis.Kletnieks@vt.edu, dhowells@redhat.com, eric.dumazet@gmail.com, darren@dvhart.com, patches@linaro.org, "Paul E. McKenney" , anton@samba.org, benh@kernel.crashing.org, paulus@samba.org Subject: [PATCH tip/core/rcu 48/55] powerpc: strengthen value-returning-atomics memory barriers Date: Tue, 6 Sep 2011 11:00:42 -0700 Message-Id: <1315332049-2604-48-git-send-email-paulmck@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.3.2 In-Reply-To: <20110906180015.GA2560@linux.vnet.ibm.com> References: <20110906180015.GA2560@linux.vnet.ibm.com> The trailing isync/lwsync in PowerPC value-returning atomics needs to be a sync in order to provide the required ordering properties. The leading lwsync/eieio can remain, as the remainder of the required ordering guarantees are provided by the atomic instructions: Any reordering will cause the stwcx to fail, which will result in a retry. This commit provides the needed adjustment. Signed-off-by: Paul E. McKenney Cc: anton@samba.org Cc: benh@kernel.crashing.org Cc: paulus@samba.org Acked-by: Olof Johansson --- arch/powerpc/include/asm/synch.h | 6 +----- 1 files changed, 1 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h index d7cab44..4d97fbe 100644 --- a/arch/powerpc/include/asm/synch.h +++ b/arch/powerpc/include/asm/synch.h @@ -37,11 +37,7 @@ static inline void isync(void) #endif #ifdef CONFIG_SMP -#define __PPC_ACQUIRE_BARRIER \ - START_LWSYNC_SECTION(97); \ - isync; \ - MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup); -#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER) +#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(sync;) #define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n" #else #define PPC_ACQUIRE_BARRIER