From patchwork Mon Oct 3 03:29:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 4475 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2B0C623F58 for ; Mon, 3 Oct 2011 03:34:03 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 11B3FA1868B for ; Mon, 3 Oct 2011 03:34:03 +0000 (UTC) Received: by bke5 with SMTP id 5so6517647bke.11 for ; Sun, 02 Oct 2011 20:34:02 -0700 (PDT) Received: by 10.223.57.17 with SMTP id a17mr8508799fah.65.1317612842661; Sun, 02 Oct 2011 20:34:02 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.23.170 with SMTP id n10cs1030laf; Sun, 2 Oct 2011 20:34:02 -0700 (PDT) Received: by 10.150.210.9 with SMTP id i9mr8677095ybg.120.1317612840988; Sun, 02 Oct 2011 20:34:00 -0700 (PDT) Received: from mail-yw0-f50.google.com (mail-yw0-f50.google.com [209.85.213.50]) by mx.google.com with ESMTPS id q41si5382962ybc.108.2011.10.02.20.34.00 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 02 Oct 2011 20:34:00 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of tushar.behera@linaro.org) client-ip=209.85.213.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of tushar.behera@linaro.org) smtp.mail=tushar.behera@linaro.org Received: by ywm13 with SMTP id 13so3667720ywm.37 for ; Sun, 02 Oct 2011 20:34:00 -0700 (PDT) Received: by 10.68.32.73 with SMTP id g9mr24145049pbi.56.1317612840110; Sun, 02 Oct 2011 20:34:00 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id p4sm14855076pbs.6.2011.10.02.20.33.57 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 02 Oct 2011 20:33:59 -0700 (PDT) From: Tushar Behera To: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: grant.likely@secretlab.ca, kgene.kim@samsung.com, linaro-dev@lists.linaro.org, patches@linaro.org Subject: [PATCH] gpio/samsung: Move SoC specific codes within macro Date: Mon, 3 Oct 2011 08:59:19 +0530 Message-Id: <1317612559-8930-1-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.4.1 In drivers/gpio/gpio-samsung.c, there are certain structures and functions which are not getting used if the particular CPU is not selected. These code segments are moved under CPU specific macros to remove compilation warnings. Signed-off-by: Tushar Behera Acked-by: Grant Likely --- It has been build tested with s3c2410_defconfig, s3c6400_defconfig, s5p64x0_defconfig, s5pc100_defconfig, s5pv210_defconfig and exynos4_defconfig. The patch has been rebased onto Commit: gpio/samsung: correct pin configuration for S5PC100/S5PC110/EXYNOS4 on git://github.com/kgene/linux-samsung.git (next/topic-gpio-samsung) drivers/gpio/gpio-samsung.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index b6be77a..33d62d1 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -318,6 +318,7 @@ static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip, return S3C_GPIO_SPECIAL(con); } +#ifdef CONFIG_PLAT_S3C24XX /* * s3c24xx_gpio_setcfg_abank - S3C24XX style GPIO configuration (Bank A) * @chip: The gpio chip that is being configured. @@ -379,7 +380,9 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, return S3C_GPIO_SFN(con); } +#endif +#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip, unsigned int off, unsigned int cfg) { @@ -417,6 +420,7 @@ static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip, return 0; } +#endif static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, int nr_chips) @@ -438,10 +442,12 @@ struct samsung_gpio_cfg s3c24xx_gpiocfg_default = { .get_config = samsung_gpio_getcfg_2bit, }; +#ifdef CONFIG_PLAT_S3C24XX static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { .set_config = s3c24xx_gpio_setcfg_abank, .get_config = s3c24xx_gpio_getcfg_abank, }; +#endif static struct samsung_gpio_cfg exynos4_gpio_cfg = { .set_pull = exynos4_gpio_setpull, @@ -450,6 +456,7 @@ static struct samsung_gpio_cfg exynos4_gpio_cfg = { .get_config = samsung_gpio_getcfg_4bit, }; +#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { .cfg_eint = 0x3, .set_config = s5p64x0_gpio_setcfg_rbank, @@ -457,6 +464,7 @@ static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { .set_pull = samsung_gpio_setpull_updown, .get_pull = samsung_gpio_getpull_updown, }; +#endif static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { { @@ -682,6 +690,7 @@ static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip, return 0; } +#ifdef CONFIG_PLAT_S3C24XX /* The next set of routines are for the case of s3c24xx bank a */ static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) @@ -717,6 +726,7 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, local_irq_restore(flags); return 0; } +#endif /* The next set of routines are for the case of s5p64x0 bank r */