From patchwork Tue Dec 27 10:16:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Liu X-Patchwork-Id: 5990 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7CC7A23E14 for ; Tue, 27 Dec 2011 10:17:08 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id 62309A18573 for ; Tue, 27 Dec 2011 10:17:08 +0000 (UTC) Received: by eaac11 with SMTP id c11so9755057eaa.11 for ; Tue, 27 Dec 2011 02:17:08 -0800 (PST) Received: by 10.205.141.78 with SMTP id jd14mr6681564bkc.107.1324981027995; Tue, 27 Dec 2011 02:17:07 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs168559bkc; Tue, 27 Dec 2011 02:17:07 -0800 (PST) Received: by 10.236.152.35 with SMTP id c23mr36280235yhk.58.1324981026527; Tue, 27 Dec 2011 02:17:06 -0800 (PST) Received: from mail-gy0-f178.google.com (mail-gy0-f178.google.com [209.85.160.178]) by mx.google.com with ESMTPS id s30si21399433yhm.140.2011.12.27.02.17.05 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 27 Dec 2011 02:17:06 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) client-ip=209.85.160.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of paul.liu@linaro.org) smtp.mail=paul.liu@linaro.org Received: by ghbg19 with SMTP id g19so1983297ghb.37 for ; Tue, 27 Dec 2011 02:17:05 -0800 (PST) Received: by 10.236.168.40 with SMTP id j28mr4538293yhl.12.1324981025165; Tue, 27 Dec 2011 02:17:05 -0800 (PST) Received: from freya.lan (host-77.138-185-111.static.totalbb.net.tw. [111.185.138.77]) by mx.google.com with ESMTPS id 9sm65520917any.3.2011.12.27.02.17.01 (version=SSLv3 cipher=OTHER); Tue, 27 Dec 2011 02:17:04 -0800 (PST) From: "Ying-Chun Liu (PaulLiu)" To: linux-kernel@vger.kernel.org, linaro-dev@lists.linaro.org Cc: patches@linaro.org, eric.miao@linaro.org, "Ying-Chun Liu (PaulLiu)" , Nancy Chen , Mark Brown , Liam Girdwood Subject: [PATCH v3] Regulator: Add Anatop regulator driver Date: Tue, 27 Dec 2011 18:16:34 +0800 Message-Id: <1324980994-18462-1-git-send-email-paul.liu@linaro.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1324458211-1612-1-git-send-email-paul.liu@linaro.org> References: <1324458211-1612-1-git-send-email-paul.liu@linaro.org> From: "Ying-Chun Liu (PaulLiu)" Anatop is an integrated regulator inside i.MX6 SoC. There are 3 digital regulators which controls PU, CORE (ARM), and SOC. And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB). This patch adds the Anatop regulator driver. Signed-off-by: Nancy Chen Signed-off-by: Ying-Chun Liu (PaulLiu) Cc: Mark Brown Cc: Liam Girdwood --- drivers/regulator/Kconfig | 6 + drivers/regulator/Makefile | 1 + drivers/regulator/anatop-regulator.c | 214 ++++++++++++++++++++++++++++ include/linux/regulator/anatop-regulator.h | 63 ++++++++ 4 files changed, 284 insertions(+), 0 deletions(-) create mode 100644 drivers/regulator/anatop-regulator.c create mode 100644 include/linux/regulator/anatop-regulator.h diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 9713b1b..fc22b8d 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -327,5 +327,11 @@ config REGULATOR_AAT2870 If you have a AnalogicTech AAT2870 say Y to enable the regulator driver. +config REGULATOR_ANATOP + tristate "ANATOP LDO regulators" + depends on SOC_IMX6 + help + Say y here to support ANATOP LDOs regulators. + endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 93a6318..990c332 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -46,5 +46,6 @@ obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o +obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c new file mode 100644 index 0000000..a925bcc --- /dev/null +++ b/drivers/regulator/anatop-regulator.c @@ -0,0 +1,214 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int anatop_set_voltage(struct regulator_dev *reg, int min_uV, + int max_uV, unsigned *selector) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + u32 val, rega, sel; + int uv; + + uv = min_uV; + pr_debug("%s: uv %d, min %d, max %d\n", __func__, + uv, anatop_reg->rdata->min_voltage, + anatop_reg->rdata->max_voltage); + + if (uv < anatop_reg->rdata->min_voltage + || uv > anatop_reg->rdata->max_voltage) { + if (max_uV > anatop_reg->rdata->min_voltage) + uv = anatop_reg->rdata->min_voltage; + else + return -EINVAL; + } + + if (uv < reg->constraints->min_uV || uv > reg->constraints->max_uV) + return -EINVAL; + + if (anatop_reg->rdata->control_reg) { + sel = (uv - anatop_reg->rdata->min_voltage) / 25000; + val = anatop_reg->rdata->min_bit_val + sel; + rega = (__raw_readl(anatop_reg->rdata->control_reg) & + ~(anatop_reg->rdata->vol_bit_mask << + anatop_reg->rdata->vol_bit_shift)); + *selector = sel; + pr_debug("%s: calculated val %d\n", __func__, val); + __raw_writel((val << anatop_reg->rdata->vol_bit_shift) | rega, + anatop_reg->rdata->control_reg); + return 0; + } else { + return -ENOTSUPP; + } +} + +static int anatop_get_voltage_sel(struct regulator_dev *reg) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); + int selector; + struct anatop_regulator_data *rdata = anatop_reg->rdata; + + if (rdata->control_reg) { + u32 val = (__raw_readl(rdata->control_reg) << + rdata->vol_bit_shift) & rdata->vol_bit_mask; + selector = val - rdata->min_bit_val; + return selector; + } else { + return -ENOTSUPP; + } +} + +static int anatop_list_voltage(struct regulator_dev *dev, unsigned selector) +{ + struct anatop_regulator *anatop_reg = rdev_get_drvdata(dev); + int uv; + struct anatop_regulator_data *rdata = anatop_reg->rdata; + + uv = rdata->min_voltage + + selector * 25000; + pr_debug("vddio = %d, selector = %u\n", uv, selector); + return uv; +} + +static struct regulator_ops anatop_rops = { + .set_voltage = anatop_set_voltage, + .get_voltage_sel = anatop_get_voltage_sel, + .list_voltage = anatop_list_voltage, +}; + +static struct regulator_desc anatop_reg_desc[] = { + { + .name = "vddpu", + .id = ANATOP_VDDPU, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vddcore", + .id = ANATOP_VDDCORE, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vddsoc", + .id = ANATOP_VDDSOC, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vdd2p5", + .id = ANATOP_VDD2P5, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vdd1p1", + .id = ANATOP_VDD1P1, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vdd3p0", + .id = ANATOP_VDD3P0, + .ops = &anatop_rops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, +}; + +int anatop_regulator_probe(struct platform_device *pdev) +{ + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + struct anatop_regulator *sreg; + struct regulator_init_data *initdata; + + initdata = pdev->dev.platform_data; + sreg = initdata->driver_data; + + spin_lock_init(&sreg->lock); + + if (pdev->id > ANATOP_SUPPLY_NUM) { + dev_err(&pdev->dev, "failed to register regulator id %d\n", + pdev->id); + return -EINVAL; + } else { + rdesc = &anatop_reg_desc[pdev->id]; + } + + /* register regulator */ + rdev = regulator_register(rdesc, &pdev->dev, + pdev->dev.platform_data, sreg); + platform_set_drvdata(pdev, rdev); + + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + rdesc->name); + return PTR_ERR(rdev); + } + + return 0; +} + +int anatop_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + regulator_unregister(rdev); + return 0; +} + +struct platform_driver anatop_reg = { + .driver = { + .name = "anatop_reg", + }, + .probe = anatop_regulator_probe, + .remove = anatop_regulator_remove, +}; + +int anatop_regulator_init(void) +{ + return platform_driver_register(&anatop_reg); +} + +void anatop_regulator_exit(void) +{ + platform_driver_unregister(&anatop_reg); +} + +postcore_initcall(anatop_regulator_init); +module_exit(anatop_regulator_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("ANATOP Regulator driver"); +MODULE_LICENSE("GPL"); + diff --git a/include/linux/regulator/anatop-regulator.h b/include/linux/regulator/anatop-regulator.h new file mode 100644 index 0000000..b29b009 --- /dev/null +++ b/include/linux/regulator/anatop-regulator.h @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef __ANATOP_REGULATOR_H +#define __ANATOP_REGULATOR_H +#include + +/* regulator supplies for Anatop */ +enum anatop_regulator_supplies { + ANATOP_VDDPU, + ANATOP_VDDCORE, + ANATOP_VDDSOC, + ANATOP_VDD2P5, + ANATOP_VDD1P1, + ANATOP_VDD3P0, + ANATOP_SUPPLY_NUM +}; + +struct anatop_regulator { + struct regulator_desc regulator; + struct anatop_regulator *parent; + struct anatop_regulator_data *rdata; + struct completion done; + + spinlock_t lock; + struct notifier_block nb; + +}; + + +struct anatop_regulator_data { + const char *name; + + u32 control_reg; + int vol_bit_shift; + int vol_bit_mask; + int min_bit_val; + int min_voltage; + int max_voltage; +}; + +int anatop_register_regulator( + struct anatop_regulator *reg_data, int reg, + struct regulator_init_data *initdata); + +#endif /* __ANATOP_REGULATOR_H */