From patchwork Tue Sep 25 11:01:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11714 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D660623EFC for ; Tue, 25 Sep 2012 11:03:04 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 646AAA184DD for ; Tue, 25 Sep 2012 11:03:04 +0000 (UTC) Received: by ieje10 with SMTP id e10so12468945iej.11 for ; Tue, 25 Sep 2012 04:03:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=xTQpCjoSLpgIgSIJadDQ3uCZiyTIVqZhxzrYk9AmPz8=; b=YtberCNCVH1EXXFzL4P4DH/dzDuiUKWIJdSyudtR3UBRWuh32v7m7bY2El3Yxc8QCd V5o2c90/FL+aKpLSwUVPINR2yFb2kVPRF7j4uDHC9gVWRxOR7hQFVaQnC7Qxdnx8OoAN IHAZTZcbePqerDB2/P5xrllxBIcDSblChOZmXqvTXnQqXpGcHHV01exHvchkJyvm979H zatPsY17nXL+VBbUTKLYp+Vbt0zWymCO48tQ7YwXLKtVY33v9JGIrKXocGt2C+ga4MvH 4RbX0ncPddIWgY7Eta6f2GyblLmR5KK2lp5Y89IOa0bpRW7Ebf/KQ6JgesgbQrYMjk4r qWsw== Received: by 10.50.150.198 with SMTP id uk6mr2092155igb.43.1348570983689; Tue, 25 Sep 2012 04:03:03 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp287703igc; Tue, 25 Sep 2012 04:03:02 -0700 (PDT) Received: by 10.14.198.133 with SMTP id v5mr18993741een.7.1348570981849; Tue, 25 Sep 2012 04:03:01 -0700 (PDT) Received: from eu1sys200aog112.obsmtp.com (eu1sys200aog112.obsmtp.com [207.126.144.133]) by mx.google.com with SMTP id a1si12982729eep.124.2012.09.25.04.02.09 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 25 Sep 2012 04:03:01 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.133; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob112.postini.com ([207.126.147.11]) with SMTP ID DSNKUGGPL/qPLCmRGBkrk05rbT8nbwkLQZyG@postini.com; Tue, 25 Sep 2012 11:02:16 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 4E85A47; Tue, 25 Sep 2012 11:01:31 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 5AFA548; Tue, 25 Sep 2012 06:52:31 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id B0424A8088; Tue, 25 Sep 2012 13:01:56 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 25 Sep 2012 13:02:01 +0200 From: Linus Walleij To: , , Cc: Anmar Oueja , Patrice Chotard , Linus Walleij Subject: [PATCH] ARM: ux500: 8500: update I2C sleep states pinctrl Date: Tue, 25 Sep 2012 13:01:55 +0200 Message-ID: <1348570915-3116-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQm9Def0nyEIe8dB4owg1PmDNvLq6KxsSIzSYPjldSqvTqJFFcLwDKi0d0J08usgiNPdnSTp From: Patrice Chotard This defines the proper sleep states for all the I2C pins of the MOP500 DB8500 ASIC setting. Signed-off-by: Patrice Chotard Signed-off-by: Linus Walleij --- Requesting ARM SoC ACKs to take this through pinctrl for ease-of-merge going forward, as dependecies are in there. --- arch/arm/mach-ux500/board-mop500-pins.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 722523c..099369e 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -30,7 +30,6 @@ static enum custom_pin_cfg_t pinsfor; #define BIAS(a,b) static unsigned long a[] = { b } BIAS(pd, PIN_PULL_DOWN); -BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); BIAS(in_nopull, PIN_INPUT_NOPULL); BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE); BIAS(in_pu, PIN_INPUT_PULLUP); @@ -55,12 +54,16 @@ BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_ BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); +BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); /* We use these to define hog settings that are always done on boot */ #define DB8500_MUX_HOG(group,func) \ PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func) #define DB8500_PIN_HOG(pin,conf) \ PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf) +#define DB8500_PIN_SLEEP(pin, conf, dev) \ + PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ + pin, conf) /* These are default states associated with device and changed runtime */ #define DB8500_MUX(group,func,dev) \ @@ -160,19 +163,26 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = { DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */ DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"), - /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */ + /* Mux in i2c0 block, default state */ DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"), - DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"), - DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"), + /* i2c0 sleep state */ + DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */ + DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */ + /* Mux in i2c1 block, default state */ DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"), - DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"), - DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"), + /* i2c1 sleep state */ + DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */ + DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */ + /* Mux in i2c2 block, default state */ DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"), - DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"), - DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"), + /* i2c2 sleep state */ + DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */ + DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */ + /* Mux in i2c3 block, default state */ DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"), - DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"), - DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"), + /* i2c3 sleep state */ + DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */ + DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */ /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */ DB8500_MUX("mc0_a_1", "mc0", "sdi0"), DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */