From patchwork Mon Oct 1 07:35:22 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11878 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C4A7823EFD for ; Mon, 1 Oct 2012 07:36:08 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 501D2A18ABE for ; Mon, 1 Oct 2012 07:36:08 +0000 (UTC) Received: by ieje10 with SMTP id e10so10988350iej.11 for ; Mon, 01 Oct 2012 00:36:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=XiCiotteaRp/UHrc5I0xi+4EoRBsoFaOEPD12MkNPdA=; b=oFojcdCx6d8FuNJv+zLn+4dqmPtTRLPYvORKEt6ZMTwvxOHpAslqnh/notZ0p24YJK n6ACNlvu6VR5tbzL/hllJ4meFmq3jxoKBdYcf6P2b73g8OySe/H7tlv6oYqb0Hhl3RyB CZ3Bna4Dmoyxyg6BQbZGgOad6Brjfh9by4zMKnyleBtSw+z4+DwwU2vFbol39gymeSPl pP6N8Dqt0y9yBAeqmh95zKwwlKvLAObb7uocvEybin4aasQP4hB0UcqZJPGrI/dJXa6s KQrWjyJP3sbqHYdzoboRyazh+I4YgdSe6VnZxVBHnH9lP/gbNM/nT073S3efkck/lohL FxjQ== Received: by 10.50.194.136 with SMTP id hw8mr4909981igc.28.1349076967466; Mon, 01 Oct 2012 00:36:07 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp11390igc; Mon, 1 Oct 2012 00:36:06 -0700 (PDT) Received: by 10.14.218.134 with SMTP id k6mr17055618eep.14.1349076965130; Mon, 01 Oct 2012 00:36:05 -0700 (PDT) Received: from eu1sys200aog114.obsmtp.com (eu1sys200aog114.obsmtp.com [207.126.144.137]) by mx.google.com with SMTP id h45si2631857eem.89.2012.10.01.00.35.50 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 01 Oct 2012 00:36:05 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.137; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob114.postini.com ([207.126.147.11]) with SMTP ID DSNKUGlHzHtx1ElPJjIhY69kKzN2/hdEdNvO@postini.com; Mon, 01 Oct 2012 07:36:04 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 206479D; Mon, 1 Oct 2012 07:27:20 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 44665A51; Mon, 1 Oct 2012 07:35:33 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 1D8EB24C07C; Mon, 1 Oct 2012 09:35:28 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 1 Oct 2012 09:35:31 +0200 From: Linus Walleij To: , Grant Likely , Rob Herring , Thomas Gleixner Cc: Anmar Oueja , Linus Walleij , Paul Mundt , Russell King , Lee Jones Subject: [PATCH 2/4 v2] irqdomain: augment add_simple() to allocate descs Date: Mon, 1 Oct 2012 09:35:22 +0200 Message-ID: <1349076922-25874-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnXH1pMvSJdyHXM8OcGUlLzIlfL3oR/LeAUM2dFbsuLV6j2/U5NZbRs/uODpAuZ/4gJAyiR From: Linus Walleij Currently we rely on all IRQ chip instances to dynamically allocate their IRQ descriptors unless they use the linear IRQ domain. So for irqdomain_add_legacy() and irqdomain_add_simple() the caller need to make sure that descriptors are allocated. Let's slightly augment the yet unused irqdomain_add_simple() to also allocate descriptors as a means to simplify usage and avoid code duplication throughout the kernel. We warn if descriptors cannot be allocated, e.g. if a platform has the bad habit of hogging descriptors at boot time. Cc: Rob Herring Cc: Thomas Gleixner Cc: Grant Likely Cc: Paul Mundt Cc: Russell King Cc: Lee Jones Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Switch descriptor allocation on IS_ENABLED(CONFIG_SPARSE_IRQ) so it won't attempt to allocate descriptors in the non-sparse case. - Use of_node_to_nid() to make sure we work on platforms with their own node concept. - Specify irq_alloc_descs(first_irq, first_irq ...) to emulate irq_alloc_desc_at(). --- kernel/irq/irqdomain.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 49a7772..4e69e24 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -148,7 +148,8 @@ static unsigned int irq_domain_legacy_revmap(struct irq_domain *domain, * @host_data: Controller private data pointer * * Allocates a legacy irq_domain if irq_base is positive or a linear - * domain otherwise. + * domain otherwise. For the legacy domain, IRQ descriptors will also + * be allocated. * * This is intended to implement the expected behaviour for most * interrupt controllers which is that a linear mapping should @@ -162,11 +163,33 @@ struct irq_domain *irq_domain_add_simple(struct device_node *of_node, const struct irq_domain_ops *ops, void *host_data) { - if (first_irq > 0) - return irq_domain_add_legacy(of_node, size, first_irq, 0, + if (first_irq > 0) { + int irq_base; + + if (IS_ENABLED(CONFIG_SPARSE_IRQ)) { + /* + * Set the descriptor allocator to search for a + * 1-to-1 mapping, such as irq_alloc_desc_at(). + * Use of_node_to_nid() which is defined to + * numa_node_id() on platforms that have no custom + * implementation. + */ + irq_base = irq_alloc_descs(first_irq, first_irq, size, + of_node_to_nid(of_node)); + if (irq_base < 0) { + WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", + first_irq); + irq_base = first_irq; + } + } else + irq_base = first_irq; + + return irq_domain_add_legacy(of_node, size, irq_base, 0, ops, host_data); - else - return irq_domain_add_linear(of_node, size, ops, host_data); + } + + /* A linear domain is the default */ + return irq_domain_add_linear(of_node, size, ops, host_data); } /**