From patchwork Thu Nov 8 11:55:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 12767 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id AB9F123DFE for ; Thu, 8 Nov 2012 11:55:55 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3248BA19DCD for ; Thu, 8 Nov 2012 11:55:55 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so3830417iej.11 for ; Thu, 08 Nov 2012 03:55:54 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=uz3zisXktTmvGkEbiQwZ7rGE8wQ8l3Ru/L3ozaGWxT8=; b=I6XpieT/d4BFMK33vm0sqqC2rlZ1SH5lw2cdlHbBV6f68fiPFeM09dWhgpe+mtUvGs KlZSSQrWUjUOh3elRhJmdn1kQYTqs98Ni37y4hkPPqnOcl7bksP1JyyeBug5snbvg9Ye ulmzH95s9YQVTMERCj45FX1+Tt3XhEIfLLQiwMeD3onHcerYKSr8UbkgToxQo3Oaq+m8 flW2mzfzi2LyEjK8mISi49BcBEMG7si9vnUAE+WgKbm7MAT3DfrntNDLiyqdhwmjxD3r GIFkPw3jmskaItPyeRac9nj/BhAgOuxpp5fbYneGojMyQAJbhYzgiTsPaCy0uITOOEzD phYQ== Received: by 10.50.237.69 with SMTP id va5mr5047954igc.62.1352375754552; Thu, 08 Nov 2012 03:55:54 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp357512igt; Thu, 8 Nov 2012 03:55:53 -0800 (PST) Received: by 10.14.175.71 with SMTP id y47mr26621702eel.36.1352375753322; Thu, 08 Nov 2012 03:55:53 -0800 (PST) Received: from eu1sys200aog116.obsmtp.com (eu1sys200aog116.obsmtp.com [207.126.144.141]) by mx.google.com with SMTP id m6si2409108eed.117.2012.11.08.03.55.44 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 08 Nov 2012 03:55:53 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.141; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.141 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob116.postini.com ([207.126.147.11]) with SMTP ID DSNKUJudvqk8MqGR7Ucv5L/OIw+Ew+oZCcch@postini.com; Thu, 08 Nov 2012 11:55:53 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D72E1214; Thu, 8 Nov 2012 11:55:38 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1657244FD; Thu, 8 Nov 2012 11:55:38 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id B805E24C2F4; Thu, 8 Nov 2012 12:55:31 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Thu, 8 Nov 2012 12:55:37 +0100 From: Linus Walleij To: , , Cc: Stephen Warren , Anmar Oueja , Jonas Aaberg , Linus Walleij Subject: [PATCH 1/2] ARM: ux500: add PRCM register base for pinctrl Date: Thu, 8 Nov 2012 12:55:31 +0100 Message-ID: <1352375731-29570-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQm37/NRc2OklPHfc32DneaFLHczwjYxuxZLYMJyQF9tCcNXKh1sepIX1Hg/BSNnCbBJ+w6E From: Jonas Aaberg This adds the PRCM register range base as a resource to the pinctrl driver do we can break the dependency to the PRCMU driver and handle these registers in the driver alone. Cc: arm@kernel.org Signed-off-by: Jonas Aaberg Signed-off-by: Linus Walleij --- ARM SoC guys: this patch is better contained in the pinctrl tree, can I have your ACK to push it through pinctrl? Thanks. --- arch/arm/mach-ux500/cpu-db8500.c | 2 +- arch/arm/mach-ux500/devices-common.h | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 87a8f9f..113d9c4 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -158,7 +158,7 @@ static void __init db8500_add_gpios(struct device *parent) dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), IRQ_DB8500_GPIO0, &pdata); - dbx500_add_pinctrl(parent, "pinctrl-db8500"); + dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE); } static int usb_db8500_rx_dma_cfg[] = { diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h index 7fbf0ba..96fa4ac 100644 --- a/arch/arm/mach-ux500/devices-common.h +++ b/arch/arm/mach-ux500/devices-common.h @@ -129,12 +129,18 @@ void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num, int irq, struct nmk_gpio_platform_data *pdata); static inline void -dbx500_add_pinctrl(struct device *parent, const char *name) +dbx500_add_pinctrl(struct device *parent, const char *name, + resource_size_t base) { + struct resource res[] = { + DEFINE_RES_MEM(base, SZ_8K), + }; struct platform_device_info pdevinfo = { .parent = parent, .name = name, .id = -1, + .res = res, + .num_res = ARRAY_SIZE(res), }; platform_device_register_full(&pdevinfo);