From patchwork Fri Dec 14 16:19:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 13597 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5BF9723FB4 for ; Fri, 14 Dec 2012 16:20:07 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id E88E9A18D6B for ; Fri, 14 Dec 2012 16:20:06 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id c10so6157913ieb.11 for ; Fri, 14 Dec 2012 08:20:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=baPZbR+tDk6t/YqztmWNrzqatr9Sc36bqQ1lvzshn9o=; b=L0pnZe2qWZGHIjU12xwlIsb16ehSRMVRP5906UC6Tc4rt8UDtJxov68wDwbh1OKFnn qN45zNXM8QTUuDuBwFNAJoQM0xUVxsJ1cB2k8b+LSDGlAr4efPhdtUP1/FameWXLm1sH hTZsmU+BdwosaR+f66d6yc6U0WakMSjzMJpJBjDy/GeDezRlzfxnX9gj+TM8SGJdChqu k6uz3X2Ctcbue1J01gnRai943ArAs0n2oXODsUIAZzQkBXJPyewFnyiG1D9ZtuuiHk8t B8HgUdJpkxd600PXYKxvQmVC0ctAV1fdQSgrgHksUioBZjbeMePqK7C5e2RL30MhQ66r MjwQ== Received: by 10.50.36.164 with SMTP id r4mr2033806igj.57.1355502006122; Fri, 14 Dec 2012 08:20:06 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp81597igt; Fri, 14 Dec 2012 08:20:05 -0800 (PST) Received: by 10.180.102.40 with SMTP id fl8mr3578120wib.22.1355502004736; Fri, 14 Dec 2012 08:20:04 -0800 (PST) Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by mx.google.com with ESMTPS id i3si15018562wie.22.2012.12.14.08.20.04 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 14 Dec 2012 08:20:04 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.177 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.212.177; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.177 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) smtp.mail=lee.jones@linaro.org Received: by mail-wi0-f177.google.com with SMTP id hm2so600167wib.10 for ; Fri, 14 Dec 2012 08:20:04 -0800 (PST) Received: by 10.180.20.177 with SMTP id o17mr3583772wie.18.1355502004247; Fri, 14 Dec 2012 08:20:04 -0800 (PST) Received: from localhost.localdomain (cpc1-aztw13-0-0-cust473.18-1.cable.virginmedia.com. [77.102.241.218]) by mx.google.com with ESMTPS id u6sm8325248wif.2.2012.12.14.08.20.02 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 14 Dec 2012 08:20:03 -0800 (PST) From: Lee Jones To: linux-kernel@vger.kernel.org Cc: linus.walleij@linaro.org, Naga Radhesh , Lee Jones Subject: [PATCH 11/21] gpio: ab8500: Add support for AB8505 Chip Date: Fri, 14 Dec 2012 16:19:29 +0000 Message-Id: <1355501979-1157-12-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1355501979-1157-1-git-send-email-lee.jones@linaro.org> References: <1355501979-1157-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQnKID7/CwjwDFbILzUR7AF/iBvHxop6ncgSn+I41HONrk7WDGwht8y/LrNcJHGnb0zTjHc9 From: Naga Radhesh Number of gpio pins has been changed for AB8505, so change gpio configurations according to AB8505. Signed-off-by: Lee Jones Signed-off-by: Naga Radhesh Reviewed-by: Bibek BASU Reviewed-by: Jonas ABERG Reviewed-by: Srinidhi KASAGAR --- drivers/gpio/gpio-ab8500.c | 41 +++++++++++++++++++++++++++++++++++------ 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-ab8500.c b/drivers/gpio/gpio-ab8500.c index b78cf2f..8616368 100644 --- a/drivers/gpio/gpio-ab8500.c +++ b/drivers/gpio/gpio-ab8500.c @@ -77,6 +77,7 @@ #define AB9540_ALTFUN_REG_INDEX 7 #define AB8500_NUM_GPIO 42 #define AB9540_NUM_GPIO 54 +#define AB8505_NUM_GPIO 53 #define AB8500_NUM_VIR_GPIO_IRQ 16 enum ab8500_gpio_action { @@ -127,6 +128,24 @@ static struct ab8500_gpio_irq_cluster ab9540_irq_clusters[] = { {.start = 49, .end = 53}, }; +/* + * For AB8505 Only some GPIOs are interrupt capable, and they are + * organized in discontiguous clusters: + * + * GPIO10 to GPIO11 + * GPIO13 + * GPIO40 and GPIO41 + * GPIO50 + * GPIO52 to GPIO53 + */ +static struct ab8500_gpio_irq_cluster ab8505_irq_clusters[] = { + {.start = 9, .end = 10}, /* GPIO numbers start from 1 */ + {.start = 12, .end = 12}, + {.start = 39, .end = 40}, + {.start = 49, .end = 49}, + {.start = 51, .end = 52}, +}; + /** * to_ab8500_gpio() - get the pointer to ab8500_gpio * @chip: Member of the structure ab8500_gpio @@ -435,6 +454,7 @@ static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio) static int __devinit ab8500_gpio_probe(struct platform_device *pdev) { + struct ab8500 *parent = dev_get_drvdata(pdev->dev.parent); struct ab8500_platform_data *ab8500_pdata = dev_get_platdata(pdev->dev.parent); struct ab8500_gpio_platform_data *pdata; @@ -471,12 +491,21 @@ static int __devinit ab8500_gpio_probe(struct platform_device *pdev) last_gpio_sel_reg = AB9540_GPIO_SEL7_REG; altfun_reg_index = AB9540_ALTFUN_REG_INDEX; } else { - ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO; - ab8500_gpio->irq_cluster = ab8500_irq_clusters; - ab8500_gpio->irq_cluster_size = - ARRAY_SIZE(ab8500_irq_clusters); - last_gpio_sel_reg = AB8500_GPIO_SEL6_REG; - altfun_reg_index = AB8500_ALTFUN_REG_INDEX; + if (is_ab8505(parent)) { + ab8500_gpio->chip.ngpio = AB8505_NUM_GPIO; + ab8500_gpio->irq_cluster = ab8505_irq_clusters; + ab8500_gpio->irq_cluster_size = + ARRAY_SIZE(ab8505_irq_clusters); + last_gpio_sel_reg = AB9540_GPIO_SEL7_REG; + altfun_reg_index = AB9540_ALTFUN_REG_INDEX; + } else { + ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO; + ab8500_gpio->irq_cluster = ab8500_irq_clusters; + ab8500_gpio->irq_cluster_size = + ARRAY_SIZE(ab8500_irq_clusters); + last_gpio_sel_reg = AB8500_GPIO_SEL6_REG; + altfun_reg_index = AB8500_ALTFUN_REG_INDEX; + } } /* initialize the lock */