From patchwork Tue Feb 5 19:48:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 14561 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2550A23E92 for ; Tue, 5 Feb 2013 19:49:20 +0000 (UTC) Received: from mail-vb0-f43.google.com (mail-vb0-f43.google.com [209.85.212.43]) by fiordland.canonical.com (Postfix) with ESMTP id BA515A1883C for ; Tue, 5 Feb 2013 19:49:19 +0000 (UTC) Received: by mail-vb0-f43.google.com with SMTP id fs19so319101vbb.2 for ; Tue, 05 Feb 2013 11:49:19 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type:x-gm-message-state; bh=U6ftSHLdfUvJKVvztArAiCTqV0s/KyVkQLVexnaIWs4=; b=CM85zM3ALdZRpCLGnsxZNickggPOHQRhzuH1/oJNfLsTO5qN69L98DdmnAv1FZ8m+U SXSync+M8HaHihlnmR1onZc0sFU134wbBl/MGxF0cm2R+Yh/ZOkfacQyYlrt+ene43r9 A3sSic2xGxNX+gXv3hOH+7QLGh2hFRB+Me9Og2DKrQbrJe9/WoV3+7Ar5taABoZv4mFN cy098db2OBhLrs0Hqa9cJ/lXEA0firKl4S6n+WuUbC4fPuyHHO+cRPo7kuDBIOEZfZP2 48ldWLvMWKjkK0EsJXie57An6/YX6/L3AvWfLUIPlBJfWMWkyCEteqqlftlAfpvcBAfr pM6Q== X-Received: by 10.52.66.168 with SMTP id g8mr26142864vdt.27.1360093759240; Tue, 05 Feb 2013 11:49:19 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp143956vec; Tue, 5 Feb 2013 11:49:18 -0800 (PST) X-Received: by 10.194.174.196 with SMTP id bu4mr44816614wjc.35.1360093758027; Tue, 05 Feb 2013 11:49:18 -0800 (PST) Received: from eu1sys200aog115.obsmtp.com (eu1sys200aog115.obsmtp.com [207.126.144.139]) by mx.google.com with SMTP id n42si36918102eeo.196.2013.02.05.11.49.09 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 05 Feb 2013 11:49:18 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.139; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob115.postini.com ([207.126.147.11]) with SMTP ID DSNKURFiNSFtXxUdR0LF88yJJRwUguyYDCYY@postini.com; Tue, 05 Feb 2013 19:49:17 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E187A106; Tue, 5 Feb 2013 19:49:07 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 86F49522C; Tue, 5 Feb 2013 19:49:07 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id B1CECA8072; Tue, 5 Feb 2013 20:48:59 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 5 Feb 2013 20:49:06 +0100 From: Linus Walleij To: , Cc: Stephen Warren , Anmar Oueja , Lee Jones , Linus Walleij Subject: [PATCH 08/14] pinctrl/abx500: replace IRQ offsets with table read-in values Date: Tue, 5 Feb 2013 20:48:29 +0100 Message-ID: <1360093715-6348-9-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> References: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnfvhcxQrYXwlCf6wWzQhX1hM/3LtOMuWvSB+NV2wSSQq92sLa6+QJQfjyOGfKmeI56QRjo From: Lee Jones The ABx500 GPIO controller used to provide a set of virtual contiguous IRQs for use by sub-devices, but they have been removed after a request from Mainline Maintainers. Now the AB8500 core driver deals with almost all IRQ related issues instead. The ABx500 GPIO driver is now only used to convert between GPIO and IRQ numbers which is actually quite difficult, as the ABx500 GPIO's associated IRQs are clustered together throughout the interrupt number space at irregular intervals. To solve this quandary, we have placed the read-in values into the existing cluster information table to use during conversion. Signed-off-by: Lee Jones [Moved irq_base removal into this patch] Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ab8500.c | 6 +++--- drivers/pinctrl/pinctrl-ab8505.c | 10 +++++----- drivers/pinctrl/pinctrl-ab8540.c | 5 +++-- drivers/pinctrl/pinctrl-ab9540.c | 8 ++++---- drivers/pinctrl/pinctrl-abx500.c | 18 +++++++++++------- drivers/pinctrl/pinctrl-abx500.h | 10 ++++++---- 6 files changed, 32 insertions(+), 25 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ab8500.c b/drivers/pinctrl/pinctrl-ab8500.c index 67dc942..42675ee 100644 --- a/drivers/pinctrl/pinctrl-ab8500.c +++ b/drivers/pinctrl/pinctrl-ab8500.c @@ -456,9 +456,9 @@ struct alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1 * GPIO36 to GPIO41 */ struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(6, 13, 0), - GPIO_IRQ_CLUSTER(24, 25, 0), - GPIO_IRQ_CLUSTER(36, 41, 0), + GPIO_IRQ_CLUSTER(6, 13, 34), + GPIO_IRQ_CLUSTER(24, 25, 24), + GPIO_IRQ_CLUSTER(36, 41, 14), }; static struct abx500_pinctrl_soc_data ab8500_soc = { diff --git a/drivers/pinctrl/pinctrl-ab8505.c b/drivers/pinctrl/pinctrl-ab8505.c index 825710a..f8075c6 100644 --- a/drivers/pinctrl/pinctrl-ab8505.c +++ b/drivers/pinctrl/pinctrl-ab8505.c @@ -349,11 +349,11 @@ struct alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1 * GPIO52 to GPIO53 */ struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(10, 11, 0), - GPIO_IRQ_CLUSTER(13, 13, 0), - GPIO_IRQ_CLUSTER(40, 41, 0), - GPIO_IRQ_CLUSTER(50, 50, 0), - GPIO_IRQ_CLUSTER(52, 53, 0), + GPIO_IRQ_CLUSTER(10, 11, 34), + GPIO_IRQ_CLUSTER(13, 13, 34), + GPIO_IRQ_CLUSTER(40, 41, 14), + GPIO_IRQ_CLUSTER(50, 50, 63), + GPIO_IRQ_CLUSTER(52, 53, 63), }; static struct abx500_pinctrl_soc_data ab8505_soc = { diff --git a/drivers/pinctrl/pinctrl-ab8540.c b/drivers/pinctrl/pinctrl-ab8540.c index 0fcd943..ac2e135 100644 --- a/drivers/pinctrl/pinctrl-ab8540.c +++ b/drivers/pinctrl/pinctrl-ab8540.c @@ -377,8 +377,9 @@ static struct pullud ab8540_pullud = { * GPIO51 to GPIO54 */ struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(43, 44, 2), - GPIO_IRQ_CLUSTER(51, 54, 0), + GPIO_IRQ_CLUSTER(43, 43, 126), + GPIO_IRQ_CLUSTER(44, 44, 127), + GPIO_IRQ_CLUSTER(51, 54, 63), }; static struct abx500_pinctrl_soc_data ab8540_soc = { diff --git a/drivers/pinctrl/pinctrl-ab9540.c b/drivers/pinctrl/pinctrl-ab9540.c index 28dfb2e..a169e5b 100644 --- a/drivers/pinctrl/pinctrl-ab9540.c +++ b/drivers/pinctrl/pinctrl-ab9540.c @@ -455,10 +455,10 @@ struct alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] }; struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(10, 13, 0), - GPIO_IRQ_CLUSTER(24, 25, 0), - GPIO_IRQ_CLUSTER(40, 41, 0), - GPIO_IRQ_CLUSTER(50, 54, 0), + GPIO_IRQ_CLUSTER(10, 13, 34), + GPIO_IRQ_CLUSTER(24, 25, 24), + GPIO_IRQ_CLUSTER(40, 41, 14), + GPIO_IRQ_CLUSTER(50, 54, 63), }; static struct abx500_pinctrl_soc_data ab9540_soc = { diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c index 716c835..ded8f21 100644 --- a/drivers/pinctrl/pinctrl-abx500.c +++ b/drivers/pinctrl/pinctrl-abx500.c @@ -98,7 +98,6 @@ struct abx500_pinctrl { struct gpio_chip chip; struct ab8500 *parent; struct mutex lock; - u32 irq_base; struct abx500_gpio_irq_cluster *irq_cluster; int irq_cluster_size; }; @@ -260,18 +259,24 @@ static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); /* The AB8500 GPIO numbers are off by one */ int gpio = offset + 1; - int base = pct->irq_base; + int hwirq; int i; for (i = 0; i < pct->irq_cluster_size; i++) { struct abx500_gpio_irq_cluster *cluster = &pct->irq_cluster[i]; - if (gpio >= cluster->start && gpio <= cluster->end) - return base + gpio - cluster->start; + if (gpio >= cluster->start && gpio <= cluster->end) { + /* + * The ABx500 GPIO's associated IRQs are clustered together + * throughout the interrupt numbers at irregular intervals. + * To solve this quandry, we have placed the read-in values + * into the cluster information table. + */ + hwirq = gpio + cluster->to_irq; - /* Advance by the number of gpios in this cluster */ - base += cluster->end + cluster->offset - cluster->start + 1; + return irq_create_mapping(pct->parent->domain, hwirq); + } } return -EINVAL; @@ -850,7 +855,6 @@ static int abx500_gpio_probe(struct platform_device *pdev) pct->chip = abx500gpio_chip; pct->chip.dev = &pdev->dev; pct->chip.base = pdata->gpio_base; - pct->irq_base = pdata->irq_base; /* initialize the lock */ mutex_init(&pct->lock); diff --git a/drivers/pinctrl/pinctrl-abx500.h b/drivers/pinctrl/pinctrl-abx500.h index df8e0ff..eeca8f9 100644 --- a/drivers/pinctrl/pinctrl-abx500.h +++ b/drivers/pinctrl/pinctrl-abx500.h @@ -98,7 +98,7 @@ struct pullud { { \ .start = a, \ .end = b, \ - .offset = c, \ + .to_irq = c, \ } /** @@ -106,14 +106,16 @@ struct pullud { * capable * @start: The pin number of the first pin interrupt capable * @end: The pin number of the last pin interrupt capable - * @offset: offset used to compute specific setting strategy of - * the interrupt line + * @to_irq: The ABx500 GPIO's associated IRQs are clustered + * together throughout the interrupt numbers at irregular + * intervals. To solve this quandary, we will place the + * read-in values into the cluster information table */ struct abx500_gpio_irq_cluster { int start; int end; - int offset; + int to_irq; }; /**