From patchwork Wed Oct 16 10:59:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Richter X-Patchwork-Id: 21067 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 7B1EF25B8B for ; Wed, 16 Oct 2013 11:00:14 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id i3sf1698485oag.10 for ; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:sender:from:to:cc :subject:date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=lYiQ7akHzh7jzR4UVzP3yfBVoiiCfsTEflsjWgFv0Jc=; b=jgIT4cEYAnGTbNaP/7XKIsOG3LKtFvx4vuSZICokiBHclD1Q4iW2sJg0fCkof9lOKV NnQGm+UUA5Cq7A57mTdD/xTk9NB/VruP110qRsKyTUIAYJgGKrsC3eFi7FxRBaMKptl2 +LAS/R+87G1ovEKhSP/itt6e01NjZrU/c2SPvj9QA0AKtbM2fLFPopkjUK2CXwmkjDU9 iX02K3SbwGUZX95gotI33e8pFjP/tdthFtCTtdLbuo2Fne2+j1XseCtc9HPkUVxh3H5O gd+MT+PRnixJ4dF4eOAxM84h1oNY5ytGwtMBRAfJNaaqOaPud+3sdh9RmmKJCCLQQ8rf xYIQ== X-Received: by 10.42.37.143 with SMTP id y15mr692051icd.26.1381921213984; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.5.9 with SMTP id o9ls483763qeo.49.gmail; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) X-Received: by 10.58.136.231 with SMTP id qd7mr1797133veb.1.1381921213846; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) Received: from mail-vc0-x231.google.com (mail-vc0-x231.google.com [2607:f8b0:400c:c03::231]) by mx.google.com with ESMTPS id dt10si24498202vdb.34.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:13 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c03::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c03::231; Received: by mail-vc0-f177.google.com with SMTP id ib11so32211vcb.22 for ; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) X-Gm-Message-State: ALoCoQl0eEvxt9pPlqaCArchrZbnCGoS0VQu5U6aBGeCxlbx3K1zEMEx6qTiqQPJo7v7DDdsBDTb X-Received: by 10.58.44.197 with SMTP id g5mr1833369vem.0.1381921213524; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp29653vcz; Wed, 16 Oct 2013 04:00:12 -0700 (PDT) X-Received: by 10.204.55.137 with SMTP id u9mr1397418bkg.28.1381921212111; Wed, 16 Oct 2013 04:00:12 -0700 (PDT) Received: from mail-bk0-x22c.google.com (mail-bk0-x22c.google.com [2a00:1450:4008:c01::22c]) by mx.google.com with ESMTPS id cy5si11695238bkc.221.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:12 -0700 (PDT) Received-SPF: pass (google.com: domain of rric.net@gmail.com designates 2a00:1450:4008:c01::22c as permitted sender) client-ip=2a00:1450:4008:c01::22c; Received: by mail-bk0-f44.google.com with SMTP id mz10so202740bkb.17 for ; Wed, 16 Oct 2013 04:00:11 -0700 (PDT) X-Received: by 10.204.247.71 with SMTP id mb7mr1912230bkb.7.1381921211205; Wed, 16 Oct 2013 04:00:11 -0700 (PDT) Received: from rric.localhost (f053084124.adsl.alicedsl.de. [78.53.84.124]) by mx.google.com with ESMTPSA id kk2sm46597269bkb.10.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:10 -0700 (PDT) Sender: Robert Richter From: Robert Richter To: linux-edac@vger.kernel.org Cc: Rob Herring , linux-kernel@vger.kernel.org, Robert Richter , Robert Richter Subject: [PATCH 1/5] edac, highbank: Fix interrupt setup of mem and l2 controller Date: Wed, 16 Oct 2013 12:59:34 +0200 Message-Id: <1381921178-28511-2-git-send-email-rric@kernel.org> X-Mailer: git-send-email 1.8.4.rc3 In-Reply-To: <1381921178-28511-1-git-send-email-rric@kernel.org> References: <1381921178-28511-1-git-send-email-rric@kernel.org> X-Original-Sender: rric.net@gmail.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gmail.com Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Robert Richter Register and enable interrupts after the edac registration. Otherwise incomming ecc error interrupts lead to crashes during device setup. Fixing this in drivers for mc and l2. Signed-off-by: Robert Richter Signed-off-by: Robert Richter --- drivers/edac/highbank_l2_edac.c | 18 ++++++++++-------- drivers/edac/highbank_mc_edac.c | 18 ++++++++++-------- 2 files changed, 20 insertions(+), 16 deletions(-) diff --git a/drivers/edac/highbank_l2_edac.c b/drivers/edac/highbank_l2_edac.c index c2bd8c6..10d3d29 100644 --- a/drivers/edac/highbank_l2_edac.c +++ b/drivers/edac/highbank_l2_edac.c @@ -90,28 +90,30 @@ static int highbank_l2_err_probe(struct platform_device *pdev) goto err; } + dci->mod_name = dev_name(&pdev->dev); + dci->dev_name = dev_name(&pdev->dev); + + if (edac_device_add_device(dci)) + goto err; + drvdata->db_irq = platform_get_irq(pdev, 0); res = devm_request_irq(&pdev->dev, drvdata->db_irq, highbank_l2_err_handler, 0, dev_name(&pdev->dev), dci); if (res < 0) - goto err; + goto err2; drvdata->sb_irq = platform_get_irq(pdev, 1); res = devm_request_irq(&pdev->dev, drvdata->sb_irq, highbank_l2_err_handler, 0, dev_name(&pdev->dev), dci); if (res < 0) - goto err; - - dci->mod_name = dev_name(&pdev->dev); - dci->dev_name = dev_name(&pdev->dev); - - if (edac_device_add_device(dci)) - goto err; + goto err2; devres_close_group(&pdev->dev, NULL); return 0; +err2: + edac_device_del_device(&pdev->dev); err: devres_release_group(&pdev->dev, NULL); edac_device_free_ctl_info(dci); diff --git a/drivers/edac/highbank_mc_edac.c b/drivers/edac/highbank_mc_edac.c index 4695dd2..7a78307 100644 --- a/drivers/edac/highbank_mc_edac.c +++ b/drivers/edac/highbank_mc_edac.c @@ -189,14 +189,6 @@ static int highbank_mc_probe(struct platform_device *pdev) goto err; } - irq = platform_get_irq(pdev, 0); - res = devm_request_irq(&pdev->dev, irq, highbank_mc_err_handler, - 0, dev_name(&pdev->dev), mci); - if (res < 0) { - dev_err(&pdev->dev, "Unable to request irq %d\n", irq); - goto err; - } - mci->mtype_cap = MEM_FLAG_DDR3; mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED; mci->edac_cap = EDAC_FLAG_SECDED; @@ -217,10 +209,20 @@ static int highbank_mc_probe(struct platform_device *pdev) if (res < 0) goto err; + irq = platform_get_irq(pdev, 0); + res = devm_request_irq(&pdev->dev, irq, highbank_mc_err_handler, + 0, dev_name(&pdev->dev), mci); + if (res < 0) { + dev_err(&pdev->dev, "Unable to request irq %d\n", irq); + goto err2; + } + highbank_mc_create_debugfs_nodes(mci); devres_close_group(&pdev->dev, NULL); return 0; +err2: + edac_mc_del_mc(&pdev->dev); err: devres_release_group(&pdev->dev, NULL); edac_mc_free(mci);