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[209.132.180.67]) by mx.google.com with ESMTP id rl4si22204190pab.180.2014.09.09.02.58.20 for ; Tue, 09 Sep 2014 02:58:20 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756371AbaIIJ6A (ORCPT + 27 others); Tue, 9 Sep 2014 05:58:00 -0400 Received: from mail-pd0-f171.google.com ([209.85.192.171]:33679 "EHLO mail-pd0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756336AbaIIJ55 (ORCPT ); Tue, 9 Sep 2014 05:57:57 -0400 Received: by mail-pd0-f171.google.com with SMTP id p10so5710221pdj.16 for ; Tue, 09 Sep 2014 02:57:55 -0700 (PDT) X-Received: by 10.70.93.37 with SMTP id cr5mr13080085pdb.67.1410256675626; Tue, 09 Sep 2014 02:57:55 -0700 (PDT) Received: from pnqlab023.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id r7sm3467936pdj.75.2014.09.09.02.57.52 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 09 Sep 2014 02:57:55 -0700 (PDT) From: Ankit Jindal To: linux-kernel@vger.kernel.org Cc: "Hans J. Koch" , Greg Kroah-Hartman , patches@apm.com, linux-arm-kernel@lists.infradead.org, Rob Herring , Tushar Jagad , Ankit Jindal Subject: [PATCH 4/5] dt-bindings: Add binding info for Xgene QMTM UIO driver Date: Tue, 9 Sep 2014 15:26:58 +0530 Message-Id: <1410256619-3213-5-git-send-email-ankit.jindal@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1410256619-3213-1-git-send-email-ankit.jindal@linaro.org> References: <1410256619-3213-1-git-send-email-ankit.jindal@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ankit.jindal@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds device tree binding documentation for Xgene QMTM UIO driver. Signed-off-by: Ankit Jindal Signed-off-by: Tushar Jagad --- .../devicetree/bindings/uio/uio_xgene_qmtm.txt | 45 ++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt diff --git a/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt b/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt new file mode 100644 index 0000000..b71831b --- /dev/null +++ b/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt @@ -0,0 +1,45 @@ +APM X-Gene QMTM UIO nodes + +QMTM UIO nodes are defined for user space access to on-chip QMTM device +on APM X-Gene SOC using UIO framework. + +Required properties: +- compatible: Should be "apm,xgene-qmtm-uio" +- reg: Address and length of the register set for the device. It contains the + information of registers in the same order as described by reg-names. +- reg-names: Should contain the register set names + - "csr": QMTM control and status register address space. + - "fabric": QMTM memory mapped access to queue states. + - "qpool": Memory location for creating QMTM queues. This could be some + SRAM or reserved portion of RAM. It is expected that size and location + of qpool memory will be configurable via bootloader. +- clocks: Reference to the clock entry. +- num_queues: Number of queues under this QMTM device. +- devid: QMTM identification number for the system having multiple QMTM devices + +Optional properties: +- status: Should be "ok" or "disabled" for enabled/disabled. Default is "ok". + +Example: + qmtm1clk: qmtmclk@1f20c000 { + compatible = "apm,xgene-device-clock"; + clock-output-names = "qmtm1clk"; + status = "ok"; + }; + + qmtm1_uio: qmtm_uio@1f200000 { + compatible = "apm,xgene-qmtm-uio"; + status = "disabled"; + reg = <0x0 0x1f200000 0x0 0x10000 + 0x0 0x1b000000 0x0 0x400000 + 0x0 0x00000000 0x0 0x0>;/* filled by bootloader */ + reg-names = "csr", "fabric", "qpool"; + clocks = <&qmtm1clk 0>; + num_queues = <0x400>; + devid = <1>; + }; + + /* Board-specific peripheral configurations */ + &qmtm1_uio { + status = "ok"; + };