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[209.132.180.67]) by mx.google.com with ESMTP id ys9si30720718pab.0.2014.11.15.02.49.45 for ; Sat, 15 Nov 2014 02:49:45 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754028AbaKOKtl (ORCPT + 26 others); Sat, 15 Nov 2014 05:49:41 -0500 Received: from inca-roads.misterjones.org ([213.251.177.50]:58279 "EHLO inca-roads.misterjones.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752215AbaKOKti (ORCPT ); Sat, 15 Nov 2014 05:49:38 -0500 Received: from [90.219.10.17] (helo=why.wild-wind.fr.eu.org) by cheepnis.misterjones.org with esmtpsa (TLSv1.2:AES128-SHA256:128) (Exim 4.80) (envelope-from ) id 1Xpav5-0006NY-VX; Sat, 15 Nov 2014 11:49:32 +0100 From: Marc Zyngier To: Thomas Gleixner , Jiang Liu Cc: Yingjoe Chen , Bjorn Helgaas , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] PCI/MSI: Allow an msi_chip to be associated to an irq domain Date: Sat, 15 Nov 2014 10:49:12 +0000 Message-Id: <1416048553-29289-2-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1416048553-29289-1-git-send-email-marc.zyngier@arm.com> References: <1416048553-29289-1-git-send-email-marc.zyngier@arm.com> X-SA-Exim-Connect-IP: 90.219.10.17 X-SA-Exim-Rcpt-To: tglx@linutronix.de, jiang.liu@linux.intel.com, yingjoe.chen@mediatek.com, bhelgaas@google.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: marc.zyngier@arm.com X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , With the new stacked irq domains, it becomes pretty tempting to allocate an MSI domain per PCI bus, which would remove the requirement of either relying on arch-specific code, or a default PCI MSI domain. By allowing the msi_chip structure to carry a pointer to an irq_domain, we can easily use this in pci_msi_setup_msi_irqs. The existing code can still be used as a fallback if the MSI driver does not populate the domain field. Tested on arm64 with the GICv3 ITS driver. Signed-off-by: Marc Zyngier --- drivers/pci/msi.c | 16 +++++++++++++++- include/linux/msi.h | 3 +++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index af66b95..aa3b720 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -84,11 +84,25 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return 0; } +static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev) +{ + struct irq_domain *domain = NULL; + +#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN + if (dev->bus->msi) + domain = dev->bus->msi->domain; +#endif + if (!domain) + domain = arch_get_pci_msi_domain(dev); + + return domain; +} + static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { struct irq_domain *domain; - domain = arch_get_pci_msi_domain(dev); + domain = pci_msi_get_domain(dev); if (domain) return pci_msi_domain_alloc_irqs(domain, type, dev); diff --git a/include/linux/msi.h b/include/linux/msi.h index 8b4a69b..a8d309a 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -89,6 +89,9 @@ struct msi_chip { struct device *dev; struct device_node *of_node; struct list_head list; +#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN + struct irq_domain *domain; +#endif int (*setup_irq)(struct msi_chip *chip, struct pci_dev *dev, struct msi_desc *desc);