From patchwork Thu Jan 14 21:46:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 59792 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp154404lbb; Thu, 14 Jan 2016 13:51:05 -0800 (PST) X-Received: by 10.98.74.71 with SMTP id x68mr9616351pfa.80.1452808265190; Thu, 14 Jan 2016 13:51:05 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id un7si11599303pac.228.2016.01.14.13.51.04; Thu, 14 Jan 2016 13:51:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756771AbcANVvB (ORCPT + 29 others); Thu, 14 Jan 2016 16:51:01 -0500 Received: from mail-pa0-f45.google.com ([209.85.220.45]:34922 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754967AbcANVrS (ORCPT ); Thu, 14 Jan 2016 16:47:18 -0500 Received: by mail-pa0-f45.google.com with SMTP id ho8so122358897pac.2 for ; Thu, 14 Jan 2016 13:47:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+pjQ/jgjXxPYO2fxZeddVphbXZ3K4GystY86lOz1oPk=; b=AbXa92hNnIf747bcA3/I+MOVfesHXdkotrlj16iQSfijcRqy7+4Q8nV8Xbn99CWkTN 8V6S7wWnj2kTWQRVH05MciZPEZSX7KxCup6UPtkWzLo6DmeZHop9UH2uCnMPcrtzMzUl vsP2uB647lTOJsz4dkI7tNPO6fiYpII7m1Aks= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+pjQ/jgjXxPYO2fxZeddVphbXZ3K4GystY86lOz1oPk=; b=QDrR8b5iKitVz8DzllQgJ+3OcrJAFm7Jh9w8TQUTKbGZtWPWYsxWVpbflMejvxTmbV BBmAbsmxd+S4i+lBxeYlraIGC5wT4tAAlQY7s6FsTgEkgsa5N3Rs2z9iyEYsNEYW5not zJmOAox3EJ53+m+HHQm4BeHYESYwTe04X8ISxkBOjw6nSR6ki2nBqltm9/n+E1Hq6S8t 8+JgXXXxYRE5fIsGQ5qIKNCuDdfwsW/Cex0ebxpc8GjQwd29Bi4aXSC8FeLrQcdJKAZm X2fuCzuK8W0cU8L2+1431tP1gJn1JZ6nP7uhBQNgQAHHw3EYU7yyh5gBUBByPnh3VRz6 zKow== X-Gm-Message-State: ALoCoQlt/xrWi0V13vdTnqdCb61tvcnFxYHn3nSvu7XzWLQCq//pcQr8pi0rzOYXNmC1tnEhUXYPIcNkquWh5JwhODoOmibp6g== X-Received: by 10.66.55.66 with SMTP id q2mr9559394pap.120.1452808038429; Thu, 14 Jan 2016 13:47:18 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id c87sm11383309pfj.41.2016.01.14.13.47.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Jan 2016 13:47:17 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org, zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com, al.grant@arm.com, rabin@rab.in, Mathieu Poirier Subject: [PATCH V8 11/23] coresight: etm3x: consolidating initial config Date: Thu, 14 Jan 2016 14:46:05 -0700 Message-Id: <1452807977-8069-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1452807977-8069-1-git-send-email-mathieu.poirier@linaro.org> References: <1452807977-8069-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There is really no point in having two functions to take care of doing the initial tracer configuration. As such moving everything to 'etm_set_default()'. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++++++++++----------------- 1 file changed, 14 insertions(+), 23 deletions(-) -- 2.1.4 diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 6469d7a83aa1..d0f2a55f9b16 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -41,7 +41,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); /* The number of ETM/PTM currently registered */ static int etm_count; static struct etm_drvdata *etmdrvdata[NR_CPUS]; -static void etm_init_default_data(struct etm_config *config); /* * Memory mapped writes to clear os lock are not supported on some processors @@ -194,6 +193,19 @@ void etm_set_default(struct etm_config *config) if (WARN_ON_ONCE(!config)) return; + /* + * Taken verbatim from the TRM: + * + * To trace all memory: + * set bit [24] in register 0x009, the ETMTECR1, to 1 + * set all other bits in register 0x009, the ETMTECR1, to 0 + * set all bits in register 0x007, the ETMTECR2, to 0 + * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). + */ + config->enable_ctrl1 = BIT(24); + config->enable_ctrl2 = 0x0; + config->enable_event = ETM_HARD_WIRE_RES_A; + config->trigger_event = ETM_DEFAULT_EVENT_VAL; config->enable_event = ETM_HARD_WIRE_RES_A; @@ -577,27 +589,6 @@ static void etm_init_arch_data(void *info) CS_LOCK(drvdata->base); } -static void etm_init_default_data(struct etm_config *config) -{ - if (WARN_ON_ONCE(!config)) - return; - - etm_set_default(config); - - /* - * Taken verbatim from the TRM: - * - * To trace all memory: - * set bit [24] in register 0x009, the ETMTECR1, to 1 - * set all other bits in register 0x009, the ETMTECR1, to 0 - * set all bits in register 0x007, the ETMTECR2, to 0 - * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). - */ - config->enable_ctrl1 = BIT(24); - config->enable_ctrl2 = 0x0; - config->enable_event = ETM_HARD_WIRE_RES_A; -} - static void etm_init_trace_id(struct etm_drvdata *drvdata) { /* @@ -674,7 +665,7 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) } etm_init_trace_id(drvdata); - etm_init_default_data(&drvdata->config); + etm_set_default(&drvdata->config); desc->type = CORESIGHT_DEV_TYPE_SOURCE; desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;