From patchwork Thu Feb 25 16:27:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 102683 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp252233lbc; Thu, 25 Feb 2016 08:28:38 -0800 (PST) X-Received: by 10.98.71.15 with SMTP id u15mr64372282pfa.161.1456417717798; Thu, 25 Feb 2016 08:28:37 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q70si13418240pfa.60.2016.02.25.08.28.37; Thu, 25 Feb 2016 08:28:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760835AbcBYQ2g (ORCPT + 30 others); Thu, 25 Feb 2016 11:28:36 -0500 Received: from mout.kundenserver.de ([212.227.17.13]:54738 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759993AbcBYQ2e (ORCPT ); Thu, 25 Feb 2016 11:28:34 -0500 Received: from wuerfel.lan. ([78.42.132.4]) by mrelayeu.kundenserver.de (mreue101) with ESMTPA (Nemesis) id 0LbItu-1a5vHj31BK-00kwz3; Thu, 25 Feb 2016 17:27:57 +0100 From: Arnd Bergmann To: Barry Song Cc: linux-arm-kernel@lists.infradead.org, Philipp Zabel , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH] ARM: prima2: always enable reset controller Date: Thu, 25 Feb 2016 17:27:48 +0100 Message-Id: <1456417673-2115511-1-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 2.7.0 X-Provags-ID: V03:K0:3ELlhebZ3XFQVunZaR8mCLmXLB2XgdpbJZqX7yBF1+yXdwRtgbJ FfPMFCDp2mTCiDp1wF+Q2KIuQrOJMGMH+2xyOkka0AHbs5ksdM8YH8aso/foTpDM+1dNieR HsboVSfNy3OyV3QkKe4ek2YQUPB6DT61WJKCHbx/FZ+H/CtngaZ3nc4Hguh05Gic0hZi1IO MlB6fgjucJ3uQyBavnJIw== X-UI-Out-Filterresults: notjunk:1; V01:K0:KonmFLTb0io=:EJ/Z6Nc6QDAyjJgSVQXJ4O pWaiNCwrVZA57vk5poVfp984uDDgQm0EV9P90s4pIWOa53vvg8sTC66mAcA6EKmKxOupNdxAE tlh6cgxeF0ul04h5X51Yv6fP0deLnApAbtUSbrnqBOP/wnFFu3HNl5vlMeE0iNvvbMGRaxyhC FAlWfVNTeLpue4ULJQtkhlQKExTV7nSJZipQpPs8pZRfUPg3I1ODNPtTCGkxM3ov1+7kzb70h rlSruFJAVYNP7YMGjliaog1aegDPS0F40s9QGKo/GWaEs1htdr49ZJeCgnWY/Zv1qbdpNi9Rw zboOiMX0jKqiDI32DZsabv9gHsCESB0t2pFhNePjzP5FiSvNA3CSjMRyy80bAh8gG/3uRoVcW yD+QQPdq518dZGxczJma0KgQjIYsQOLRRurRpEEIANicGHgv4ZZ73QHc2G8V9MYWCiTYDv6w0 wL52yzCX4/ltVaG1KH1FWHIzPPcEOHHAz4XRDl6/7Pa6h0EsjHasjoN3XTLOAlI5LnBCSeG0P twliCSYaNq0B/rqeGiNs6D7fqUNchG+uZsruTQrEODNsOyBcd+j9VmSTJJOYCnqVwoRI0QN0y dtLz/AXVYxKQglI9052m7E397WQJHS9o3g9ifH5djTsluNq3x27LX2rB+VqxSXYuHvc+NUlKy EQwfDOyTSPZe9w2UeVq9wQtk5ya0z/oPvopSA05PMoZ0+pksqqYnkR6dOj4iTOEy+0fs= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The atlas7 clock controller driver registers a reset controller for itself, which causes a link error when the subsystem is disabled: drivers/built-in.o: In function `atlas7_clk_init': drivers/clk/sirf/clk-atlas7.c:1681: undefined reference to `reset_controller_register' As the clk driver does not have a Kconfig symbol for itself but it always built-in when the platform is enabled, we have to ensure that the reset controller subsystem is also built-in in this case. Signed-off-by: Arnd Bergmann Fixes: 301c5d29402e ("clk: sirf: add CSR atlas7 clk and reset support") --- arch/arm/mach-prima2/Kconfig | 1 + 1 file changed, 1 insertion(+) -- 2.7.0 diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 59cafaf097c0..86b7c859784f 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -2,6 +2,7 @@ menuconfig ARCH_SIRF bool "CSR SiRF" depends on ARCH_MULTI_V6_V7 select ARCH_HAS_RESET_CONTROLLER + select RESET_CONTROLLER select ARCH_REQUIRE_GPIOLIB select GENERIC_IRQ_CHIP select NO_IOPORT_MAP