From patchwork Tue Apr 5 13:27:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 65079 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp466799lbc; Tue, 5 Apr 2016 06:31:16 -0700 (PDT) X-Received: by 10.98.15.145 with SMTP id 17mr29197771pfp.19.1459863075121; Tue, 05 Apr 2016 06:31:15 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l77si1632668pfb.252.2016.04.05.06.31.14; Tue, 05 Apr 2016 06:31:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933251AbcDENbK (ORCPT + 29 others); Tue, 5 Apr 2016 09:31:10 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:35311 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933225AbcDENbG (ORCPT ); Tue, 5 Apr 2016 09:31:06 -0400 Received: by mail-pa0-f52.google.com with SMTP id td3so10848679pab.2 for ; Tue, 05 Apr 2016 06:31:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wYCLmAhW4yCok+bjhnzrVWNTaOWvF9BqAGo6h+z8ENg=; b=iR4Wq8WYN07hz0lV2rDEIagHPfFw3ZJSqLT7QIX6IADnDKbbEcIigNxnfbghHoTl4B P0RIo1ioH+6byH/CQCPZj44aNgsLTW/+N9HD34ko0g+o50FrW5qgm+seUU3BE1S2J8uI 7JOO6DW/b1v9OALo9PWhzpDx3NoYqgybZ187M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wYCLmAhW4yCok+bjhnzrVWNTaOWvF9BqAGo6h+z8ENg=; b=Sb84CldiOaIKIlNPrfpzm13d7d962wnQp2SGlTy77PZqoBau3glT7Oy5hyOmcdPhwR kltIApnNabdlG35eCqeWH+OXe43hwyjC2aKnV7CGMnQWScjN9qxkb73m4HitSvt9DF6m jJlbQu6GxtjPjPeAEFEdlfxWX1MSf2pNZUqv6/DYZWciblWYWXCTGXvBp6gdbv+aPacA vejap5reSe6LjOqwdCO3A04VnFxYN0/hbvLRA1MD0PB12qddjhZf39VYf+SCGTgidezG Xb3VMXvA6WzptjD/IJnQVc/9JSlH4BtYvR4dqTxCdpnBGqzhpruAY+voyiHRZtg2R1p4 yQyg== X-Gm-Message-State: AD7BkJKWCJlYs70gsGYlRQfV01o7WRN2XbuNWVBqKnpTHcDstVIHlUo50Ep9v9XRHGbGL731 X-Received: by 10.66.139.137 with SMTP id qy9mr62377657pab.57.1459863065888; Tue, 05 Apr 2016 06:31:05 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.49]) by smtp.gmail.com with ESMTPSA id wh9sm8060481pab.8.2016.04.05.06.30.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Apr 2016 06:31:05 -0700 (PDT) From: Guodong Xu To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, arnd.bergmann@linaro.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Guodong Xu Subject: [PATCH v3 12/16] arm64: dts: hi6220: add pinctrl for uarts and enable them Date: Tue, 5 Apr 2016 21:27:36 +0800 Message-Id: <1459862860-9775-13-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459862860-9775-1-git-send-email-guodong.xu@linaro.org> References: <1459862860-9775-1-git-send-email-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 12 ++++++++++++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 9 +++++++++ 2 files changed, 21 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e00e9ec..c4f560a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -50,6 +50,18 @@ i2c1: i2c@f7101000 { status = "ok"; }; + + uart1: uart@f7111000 { + status = "ok"; + }; + + uart2: uart@f7112000 { + status = "ok"; + }; + + uart3: uart@f7113000 { + status = "ok"; + }; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 2442617..994622b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -266,6 +266,8 @@ clocks = <&sys_ctrl HI6220_UART1_PCLK>, <&sys_ctrl HI6220_UART1_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>; status = "disabled"; }; @@ -276,6 +278,8 @@ clocks = <&sys_ctrl HI6220_UART2_PCLK>, <&sys_ctrl HI6220_UART2_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; status = "disabled"; }; @@ -286,6 +290,9 @@ clocks = <&sys_ctrl HI6220_UART3_PCLK>, <&sys_ctrl HI6220_UART3_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; + status = "disabled"; }; uart4: uart@f7114000 { @@ -295,6 +302,8 @@ clocks = <&sys_ctrl HI6220_UART4_PCLK>, <&sys_ctrl HI6220_UART4_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; status = "disabled"; };