From patchwork Tue Jun 14 03:01:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 69962 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp1836501qgf; Mon, 13 Jun 2016 20:01:57 -0700 (PDT) X-Received: by 10.36.192.9 with SMTP id u9mr23924439itf.90.1465873316970; Mon, 13 Jun 2016 20:01:56 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h80si5040349pfj.46.2016.06.13.20.01.56; Mon, 13 Jun 2016 20:01:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423551AbcFNDBk (ORCPT + 30 others); Mon, 13 Jun 2016 23:01:40 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:55576 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423693AbcFNDBi (ORCPT ); Mon, 13 Jun 2016 23:01:38 -0400 Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id u5E30QCu023365; Tue, 14 Jun 2016 12:00:29 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com u5E30QCu023365 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1465873229; bh=AUbVUUcawBjDYBkIcmTCEKMAmbz3CficUyCuJGtBfXI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rjh/dGUx0Nvj0Effi6epRkczw4kEVPaiTyLtuoFoPusAWCQGDVUCGdmjNHXREjiyC s/uWk5qsTL4PoKAbPPnTEZRsT1ha9WEQVMtNhw5nXV+mGmSOlqHm5INC9eJa8GNXAT TbxXRaHT7EN4vX4Dxp+WfG/nPES4PyvReQFtYamc0TJqRMArfJqpl10dnuGI+nxUAw WpEeSoe0uH9OMRO225piT+Qoff15RZGZHj1XMNU85k43RS/tJUHLdWDaQAorVhFrBn 8t7HB9rw3bV9yKQhbAnBdV1TVF0aLd/YCvpySc5iTVAteeRNh1EdHDRPaygzrQsjhL Oqgkq3GXLmDNQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: arm@kernel.org Cc: Masahiro Yamada , Will Deacon , Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: uniphier: change cpu-release-address Date: Tue, 14 Jun 2016 12:01:42 +0900 Message-Id: <1465873303-30754-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465873303-30754-1-git-send-email-yamada.masahiro@socionext.com> References: <1465873303-30754-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org At first, 256 byte of the head of DRAM space was reserved for some reasons. However, as the progress of development, it turned out unnecessary, and it was never used in the end. Move the CPU release address to leave no space. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 1.9.1 diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi index 31dc51b..644025c 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi @@ -77,7 +77,7 @@ compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x000>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu1: cpu@1 { @@ -85,7 +85,7 @@ compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x001>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu2: cpu@100 { @@ -93,7 +93,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x100>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; cpu3: cpu@101 { @@ -101,7 +101,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x101>; enable-method = "spin-table"; - cpu-release-addr = <0 0x80000100>; + cpu-release-addr = <0 0x80000000>; }; };