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[68.111.223.48]) by smtp.gmail.com with ESMTPSA id v62sm40040162pfv.50.2016.06.17.10.17.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Jun 2016 10:17:23 -0700 (PDT) From: Bjorn Andersson To: Ohad Ben-Cohen , Bjorn Andersson Cc: Ian Campbell , Mark Rutland , Pawel Moll , Rob Herring , Srinivas Kandagatla , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org Subject: [PATCH v2 2/2] dt-binding: remoteproc: Introduce Hexagon loader binding Date: Fri, 17 Jun 2016 10:17:19 -0700 Message-Id: <1466183839-5968-2-git-send-email-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1466183839-5968-1-git-send-email-bjorn.andersson@linaro.org> References: <1466183839-5968-1-git-send-email-bjorn.andersson@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This document defines the binding for a component that loads firmware and control the life cycle of a self-authenticating Qualcomm Hexagon core. Acked-by: Rob Herring Signed-off-by: Bjorn Andersson --- Changes since v1: - Corrected reg-names in the example .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 138 +++++++++++++++++++++ 1 file changed, 138 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt -- 2.5.0 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt new file mode 100644 index 000000000000..5b198c7e007b --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -0,0 +1,138 @@ +Qualcomm Hexagon Peripheral Image Loader + +This document defines the binding for a component that loads and boots firmware +on the Qualcomm Hexagon core. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,q6v5-pil" + +- reg: + Usage: required + Value type: + Definition: must specify the base address and size of the qdsp6 and + rmb register blocks + +- reg-names: + Usage: required + Value type: + Definition: must be "q6dsp" and "rmb" + +- interrupts-extended: + Usage: required + Value type: + Definition: must list the watchdog, fatal IRQs ready, handover and + stop-ack IRQs + +- interrupt-names: + Usage: required + Value type: + Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" + +- clocks: + Usage: required + Value type: + Definition: reference to the iface, bus and mem clocks to be held on + behalf of the booting of the Hexagon core + +- clock-names: + Usage: required + Value type: + Definition: must be "iface", "bus", "mem" + +- resets: + Usage: required + Value type: + Definition: reference to the reset-controller for the modem sub-system + +- reset-names: + Usage: required + Value type: + Definition: must be "mss_restart" + +- cx-supply: +- mss-supply: +- mx-supply: +- pll-supply: + Usage: required + Value type: + Definition: reference to the regulators to be held on behalf of the + booting of the Hexagon core + +- qcom,smem-states: + Usage: required + Value type: + Definition: reference to the smem state for requesting the Hexagon to + shut down + +- qcom,smem-state-names: + Usage: required + Value type: + Definition: must be "stop" + +- qcom,halt-regs: + Usage: required + Value type: + Definition: a phandle reference to a syscon representing TCSR followed + by the three offsets within syscon for q6, modem and nc + halt registers. + += SUBNODES: +The Hexagon node must contain two subnodes, named "mba" and "mpss" representing +the memory regions used by the Hexagon firmware. Each sub-node must contain: + +- memory-region: + Usage: required + Value type: + Definition: reference to the reserved-memory for the region + += EXAMPLE +The following example describes the resources needed to boot control the +Hexagon, as it is found on MSM8974 boards. + + modem-rproc@fc880000 { + compatible = "qcom,q6v5-pil"; + reg = <0xfc880000 0x100>, + <0xfc820000 0x020>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc 0 24 1>, + <&modem_smp2p_in 0 0>, + <&modem_smp2p_in 1 0>, + <&modem_smp2p_in 2 0>, + <&modem_smp2p_in 3 0>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>; + clock-names = "iface", "bus", "mem"; + + qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; + + resets = <&gcc GCC_MSS_RESTART>; + reset-names = "mss_restart"; + + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + mba { + memory-region = <&mba_region>; + }; + + mpss { + memory-region = <&mpss_region>; + }; + }; +