From patchwork Thu Nov 3 15:26:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 80681 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp692118qge; Thu, 3 Nov 2016 08:26:29 -0700 (PDT) X-Received: by 10.98.204.138 with SMTP id j10mr17569762pfk.83.1478186789870; Thu, 03 Nov 2016 08:26:29 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 20si10210405pgk.101.2016.11.03.08.26.29; Thu, 03 Nov 2016 08:26:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758175AbcKCP0U (ORCPT + 27 others); Thu, 3 Nov 2016 11:26:20 -0400 Received: from mail-wm0-f41.google.com ([74.125.82.41]:35157 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756850AbcKCP0N (ORCPT ); Thu, 3 Nov 2016 11:26:13 -0400 Received: by mail-wm0-f41.google.com with SMTP id a197so212424353wmd.0 for ; Thu, 03 Nov 2016 08:26:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Q4+6Qgy7yKGWA/aDa8n+6sUJ4xy0CpoTICG7HslspWs=; b=wpjzn67ndm2YkkCQdkgETf8wXR+16uRRuYPZukYXVu5H2NOnLwEDbK+7Re3T7ToR/p RNKaIDIltFN3IVH92iFm/B4X1kYiGi8klJQCNz8JsRPvkQrSgrMobv0l295UInX4wHm+ P4+aGpml9SkkmklHISjj0MUR88EbVLbLXGpfQdSoZsQM3DQLbeuy9/zNG3FXIggITAvm tDxVZN4v7lS5NPlUP4v4gQ7nzeYBrsDqvaQO6FmDy7a0ehc9jhmXMWL4YfYXU9nLkHjD Ov5E88hh//gfNhWfGdnHncav8k3ji9h7WL10+2mJrSNLW1LDzbvWIEvK4bdjb03oUvkM 7HoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Q4+6Qgy7yKGWA/aDa8n+6sUJ4xy0CpoTICG7HslspWs=; b=JKI6UXSx7d/4JWtIz9bVkHp3UA9ds4XAFG8jbZR0WayPZihewY+hP5yTYrxrulDCgw 4JNcksjbETWvaDja0ojyAqweGguZfs1b5JmsgZOJ8C4VDpPLMIyxevYegRfXHuoTRKPi MI7qM4UCT0nK/y0y5SKdd0FbNPzTsVRdXwzdiJ1SHnVn80a8B8bCz5w3u4AcdB5kjO3v dMzAxEvUBTkhREsnJJhp3VY+I91pLpYLnTQM8arHAaoycu8/A/owoGIdlMc911W2VUKI 5FDHE35JY4caZpwn0d8HzYwEzl/29ml/73eRt+NlqQlyZ/BsSgrcWoOkteFjnEdBYNN3 xffg== X-Gm-Message-State: ABUngvewIMUm0L5jfdRaxJC0UbEAFJl/P9CZrS9sln4BQSLyE6VQc20cN1Caj/W/IZCWl9Vp X-Received: by 10.28.52.76 with SMTP id b73mr2527598wma.8.1478186771839; Thu, 03 Nov 2016 08:26:11 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id wh3sm9108948wjb.49.2016.11.03.08.26.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Nov 2016 08:26:11 -0700 (PDT) From: Alexandre Bailon To: david@lechnology.com, b-liu@ti.com, balbi@kernel.org Cc: kishon@ti.com, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, nsekhar@ti.com, Alexandre Bailon Subject: [PATCH v3 2/5] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround Date: Thu, 3 Nov 2016 16:26:02 +0100 Message-Id: <1478186765-19840-3-git-send-email-abailon@baylibre.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1478186765-19840-1-git-send-email-abailon@baylibre.com> References: <1478186765-19840-1-git-send-email-abailon@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If we configure the da8xx OTG phy in OTG mode, neither device or host mode will work. That is because the PHY is not able to detect and notify the driver that value of ID pin changed. To work despite this hardware limitation, the da8xx glue implement a workaround. But to work, the workaround require the VBUS sense and the session end comparator to enabled. Enable them if the phy is configured in OTG mode. Signed-off-by: Alexandre Bailon --- drivers/phy/phy-da8xx-usb.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) -- 2.7.3 diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c index 32ae78c..fd39292 100644 --- a/drivers/phy/phy-da8xx-usb.c +++ b/drivers/phy/phy-da8xx-usb.c @@ -93,24 +93,31 @@ static int da8xx_usb20_phy_power_off(struct phy *phy) static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode) { struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy); + int ret; u32 val; + ret = regmap_read(d_phy->regmap, CFGCHIP(2), &val); + if (ret) + return ret; + + val &= ~CFGCHIP2_OTGMODE_MASK; + switch (mode) { case PHY_MODE_USB_HOST: /* Force VBUS valid, ID = 0 */ - val = CFGCHIP2_OTGMODE_FORCE_HOST; + val |= CFGCHIP2_OTGMODE_FORCE_HOST; break; case PHY_MODE_USB_DEVICE: /* Force VBUS valid, ID = 1 */ - val = CFGCHIP2_OTGMODE_FORCE_DEVICE; + val |= CFGCHIP2_OTGMODE_FORCE_DEVICE; break; case PHY_MODE_USB_OTG: /* Don't override the VBUS/ID comparators */ - val = CFGCHIP2_OTGMODE_NO_OVERRIDE; + val |= CFGCHIP2_OTGMODE_NO_OVERRIDE | + CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; break; default: return -EINVAL; } - regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK, - val); + regmap_write(d_phy->regmap, CFGCHIP(2), val); return 0; }