From patchwork Sat Nov 26 18:06:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 84281 Delivered-To: patch@linaro.org Received: by 10.182.1.168 with SMTP id 8csp786608obn; Sat, 26 Nov 2016 10:10:20 -0800 (PST) X-Received: by 10.99.114.89 with SMTP id c25mr24856935pgn.4.1480183820490; Sat, 26 Nov 2016 10:10:20 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q197si49434924pfq.263.2016.11.26.10.10.20; Sat, 26 Nov 2016 10:10:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753647AbcKZSKB (ORCPT + 25 others); Sat, 26 Nov 2016 13:10:01 -0500 Received: from conuserg-11.nifty.com ([210.131.2.78]:47950 "EHLO conuserg-11.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753129AbcKZSIM (ORCPT ); Sat, 26 Nov 2016 13:08:12 -0500 Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id uAQI6Uf0018512; Sun, 27 Nov 2016 03:06:55 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com uAQI6Uf0018512 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1480183616; bh=OKzaKuWQ0eTrAlH/SWlDi9XbPs09813v9qvHehUNy0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nYBZLSZ7c0TefRvnWmKH5GxpluYC2Vb0llEUG9iz8dgUXxmmEFp0ypaVnNW7TcX2C kqdPzOU3YsoVLShxG64ONetbQ/U0MDY8YOp65boOBGSO35keTSWHnb/7XgcN9lYLbM kqPEYZj96ykycd07eQRKVsvJWmme7RRdEVBs1pZhMkxGxJraSKv7V20MWrWybMYnuK vFMPLRgiMB7xM66sTdprzE3tYz0vOR8FBadYVRhArKEiZca1KG9DW5wLJz0+UjpezF +oemIKAUXUTVYGIYNqZ9bko2RD8LVINfD6SJeJeCKhzF8jKLsERH0bfakyGRcNC3DZ d5qxh9RZxYpZA== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse , Cyrille Pitchen Subject: [PATCH 28/39] mtd: nand: denali: move multi NAND fixup code to a helper function Date: Sun, 27 Nov 2016 03:06:14 +0900 Message-Id: <1480183585-592-29-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480183585-592-1-git-send-email-yamada.masahiro@socionext.com> References: <1480183585-592-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Collect multi NAND fixups into a helper function instead of scattering them in denali_init(). Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 51 ++++++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 60b0858..54dcd83 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1472,6 +1472,34 @@ static void denali_drv_init(struct denali_nand_info *denali) denali->irq_status = 0; } +static void denali_multidev_fixup(struct denali_nand_info *denali) +{ + struct nand_chip *chip = &denali->nand; + struct mtd_info *mtd = nand_to_mtd(chip); + + /* + * Support for multi NAND: + * MTD knows nothing about multi NAND, so we should tell it + * the real pagesize and anything necessary + */ + denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); + + mtd->size <<= denali->devnum - 1; + mtd->erasesize <<= denali->devnum - 1; + mtd->writesize <<= denali->devnum - 1; + mtd->oobsize <<= denali->devnum - 1; + chip->chipsize <<= denali->devnum - 1; + chip->page_shift += denali->devnum - 1; + chip->phys_erase_shift += denali->devnum - 1; + chip->bbt_erase_shift += denali->devnum - 1; + chip->chip_shift += denali->devnum - 1; + chip->pagemask <<= denali->devnum - 1; + chip->ecc.size *= denali->devnum; + chip->ecc.bytes *= denali->devnum; + chip->ecc.strength *= denali->devnum; + denali->bbtskipbytes *= denali->devnum; +} + int denali_init(struct denali_nand_info *denali) { struct nand_chip *chip = &denali->nand; @@ -1553,23 +1581,6 @@ int denali_init(struct denali_nand_info *denali) goto failed_req_irq; } - /* - * support for multi nand - * MTD known nothing about multi nand, so we should tell it - * the real pagesize and anything necessery - */ - denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); - chip->chipsize <<= denali->devnum - 1; - chip->page_shift += denali->devnum - 1; - chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; - chip->bbt_erase_shift += denali->devnum - 1; - chip->phys_erase_shift = chip->bbt_erase_shift; - chip->chip_shift += denali->devnum - 1; - mtd->writesize <<= denali->devnum - 1; - mtd->oobsize <<= denali->devnum - 1; - mtd->erasesize <<= denali->devnum - 1; - mtd->size = chip->numchips * chip->chipsize; - denali->bbtskipbytes *= denali->devnum; /* * second stage of the NAND scan @@ -1614,11 +1625,9 @@ int denali_init(struct denali_nand_info *denali) } mtd_set_ooblayout(mtd, &denali_ooblayout_ops); - chip->ecc.bytes *= denali->devnum; - chip->ecc.strength *= denali->devnum; /* override the default read operations */ - chip->ecc.size = ECC_SECTOR_SIZE * denali->devnum; + chip->ecc.size = ECC_SECTOR_SIZE; chip->ecc.read_page = denali_read_page; chip->ecc.read_page_raw = denali_read_page_raw; chip->ecc.write_page = denali_write_page; @@ -1627,6 +1636,8 @@ int denali_init(struct denali_nand_info *denali) chip->ecc.write_oob = denali_write_oob; chip->erase = denali_erase; + denali_multidev_fixup(denali); + ret = nand_scan_tail(mtd); if (ret) goto failed_req_irq;