From patchwork Mon Nov 28 11:37:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 84379 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp1090872qgi; Mon, 28 Nov 2016 03:37:53 -0800 (PST) X-Received: by 10.98.8.84 with SMTP id c81mr21043007pfd.114.1480333073828; Mon, 28 Nov 2016 03:37:53 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z3si54711459pge.291.2016.11.28.03.37.49; Mon, 28 Nov 2016 03:37:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754637AbcK1Lhe (ORCPT + 25 others); Mon, 28 Nov 2016 06:37:34 -0500 Received: from mail-wj0-f179.google.com ([209.85.210.179]:36555 "EHLO mail-wj0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754332AbcK1Lhc (ORCPT ); Mon, 28 Nov 2016 06:37:32 -0500 Received: by mail-wj0-f179.google.com with SMTP id qp4so113203873wjc.3 for ; Mon, 28 Nov 2016 03:37:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=rxdUcRf1a0aqgt8YTowLsxRdALZptC19oU8UkrlCaGE=; b=2SmTxW8861I99PUoeBGegUl0EXPv1qOhq48qf/b8eCfhNvcRgpJwYC1jKRwDVWGfLr vTJ6q3MI383LHDwPPKqhUvSAMcc54vywjtjrU6HIRTjfb4KAqCRjEIB+yDO1mGitXjm2 4V1dyAid6smzuarVqysx2uDUzetstUhYZz9k0/XzjsLuvu3pkQlCTBi+wRzChreDXzZc sxVb53EGj4x1pfmyz8UpKIuV59x8tNL2P783hevToRQQDiwZXyod9l3RHL7UDoBtkYH4 iYxE7KUfYBNIwtzERnDt2hEY+m7vKGGuzSkzRxu35W+hVTGWSB6DonN70XCAS2WT9Omw Sa4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rxdUcRf1a0aqgt8YTowLsxRdALZptC19oU8UkrlCaGE=; b=MKxyYGBo2xaTKEQm9Q/yCT1rAYmmlY+MsFWcpUhDznS6cfmOWr5GMKWzn9n44bW50h C1ZdDVwoPma2OmhBAr8SuWZYQt0XNBn8fcTue1rOhEaij7zaYSQqlz/TMfpxaDDUq6NC fEKIw6CEuX/98R2heUCtxnZU8RcLdIv5XetAhytfAbk96qzPL565vpsmLBP1GRBpgccQ SJeyMt1Zl0HNTmvgdScdll9QhH3FniP1YWt8gZd1EWtmPENoauJaMNPBIDG8JOEbBNNZ jRyv1GT0xO9Sq0l9A193g7qxS0zPx5Tyd4M7AwbaUNclxLqMF3oDfYCZ8uWfXoqc/nUe ni0g== X-Gm-Message-State: AKaTC027yYuC+G9vnHPtJpXH64WLfD7506zx6nprKttxrM/WVnLZ+gWDrEwTnnxUUMuLYoKZ X-Received: by 10.194.209.169 with SMTP id mn9mr17787115wjc.114.1480333046070; Mon, 28 Nov 2016 03:37:26 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id r138sm28475780wme.9.2016.11.28.03.37.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 28 Nov 2016 03:37:25 -0800 (PST) From: Bartosz Golaszewski To: Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Sekhar Nori Cc: LKML , linux-drm , Peter Ujfalusi , arm-soc , Bartosz Golaszewski Subject: [PATCH v2] drm: tilcdc: fix parsing of some DT properties Date: Mon, 28 Nov 2016 12:37:23 +0100 Message-Id: <1480333043-1292-1-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DT binding for tildc is not consistent with the driver code: there are two options - 'max-width' and 'max-pixelclock' specified in the documentation which are parsed as 'ti,max-width' and 'ti'max-pixelclock' respectively. Make the driver code consistent with the binding. Signed-off-by: Bartosz Golaszewski --- v1 -> v2: - fix max-pixelclock too drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.9.3 diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 5efb369..bd0a3bd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -296,12 +296,12 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); - if (of_property_read_u32(node, "ti,max-width", &priv->max_width)) + if (of_property_read_u32(node, "max-width", &priv->max_width)) priv->max_width = TILCDC_DEFAULT_MAX_WIDTH; DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); - if (of_property_read_u32(node, "ti,max-pixelclock", + if (of_property_read_u32(node, "max-pixelclock", &priv->max_pixelclock)) priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;