From patchwork Mon Dec 26 02:14:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 89009 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp4324560qgi; Sun, 25 Dec 2016 18:16:39 -0800 (PST) X-Received: by 10.99.245.21 with SMTP id w21mr46400624pgh.5.1482718599681; Sun, 25 Dec 2016 18:16:39 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c41si41660246plj.134.2016.12.25.18.16.39; Sun, 25 Dec 2016 18:16:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754769AbcLZCQb (ORCPT + 25 others); Sun, 25 Dec 2016 21:16:31 -0500 Received: from conuserg-08.nifty.com ([210.131.2.75]:45245 "EHLO conuserg-08.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754520AbcLZCQa (ORCPT ); Sun, 25 Dec 2016 21:16:30 -0500 Received: from pug.jp.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id uBQ2F0YL027518; Mon, 26 Dec 2016 11:15:00 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com uBQ2F0YL027518 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1482718501; bh=D2UWWWbTwx9YumcL9K2sRtmnJpE3tiXpALnz1P8JmXQ=; h=From:To:Cc:Subject:Date:From; b=IkCFWPIKMVI6dXF+rcW59n1HMc1AyN7ZZkp4Bi8766bDNAAsVhx3m88LYRkB9NNYi +A8hYkkMisK9um/L2TEidx+sZn4ISt29+iFI6I6xZH7hLwLn2H8SO2uOBY+GgPrBQK AYeL4L5AZCczarBqH3GbRqL90gVV8+5DJqfdzM1i1FaC71tHYRSzjgYryhd8nfO8gP kPWOQPu5gsoTD+i1A9pslP4ks1HHBRqBbneGxvHH+RLRij6H+m7v5I8ZYSx5LCBGhk zKNRaCClBiru9/YZ+GG0Z2kx/LfXTg2HKlJmKhtTgYqSqHyXKimPdWLEwsbuLRNOnh gR2aokTOaWKVQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Masahiro Yamada , Arnd Bergmann , Thierry Reding , linux-kernel@vger.kernel.org, Kevin Hilman , Wei Xu , Will Deacon , Catalin Marinas , Guodong Xu , Eric Anholt , Riku Voipio Subject: [PATCH] arm64: defconfig: enable CONFIG_MMC_SDHCI_CADENCE Date: Mon, 26 Dec 2016 11:14:53 +0900 Message-Id: <1482718493-6792-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable the Cadence SD/SDIO/eMMC controller. This is used on Socionext UniPhier SoC family. Signed-off-by: Masahiro Yamada --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0888cab..23045b4 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -384,6 +384,7 @@ CONFIG_MMC_SDHCI_ACPI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ARASAN=y CONFIG_MMC_SDHCI_OF_ESDHC=y +CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SDHCI_TEGRA=y CONFIG_MMC_SDHCI_MSM=y CONFIG_MMC_SPI=y