From patchwork Fri Jan 20 11:22:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 92062 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp731166qgi; Fri, 20 Jan 2017 03:24:09 -0800 (PST) X-Received: by 10.98.81.199 with SMTP id f190mr15738926pfb.180.1484911449346; Fri, 20 Jan 2017 03:24:09 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2si6566145plh.215.2017.01.20.03.24.09; Fri, 20 Jan 2017 03:24:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752232AbdATLX4 (ORCPT + 25 others); Fri, 20 Jan 2017 06:23:56 -0500 Received: from mail-wm0-f43.google.com ([74.125.82.43]:34539 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752030AbdATLWV (ORCPT ); Fri, 20 Jan 2017 06:22:21 -0500 Received: by mail-wm0-f43.google.com with SMTP id f73so13218466wmf.1 for ; Fri, 20 Jan 2017 03:22:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gjYAUx7cCSy+KrACbqFxG1BPaNYntYNoHa+KVUCPqgQ=; b=lQjvzmcuNFxVfWzGb9Un9cJlVCz+EI2dQS1pEVoTf4scYXk2xvailt3o/tqdZHPWHS RA267ZDILv9uOkLXIBDFkvJxi5bBFXo8EM/40lWETkulb7ysanKaMzWyB4K7icO6g48W eBFPdcvRhG8ozlJhmUR2bSoQ9xRwrbFqCiPMVMCn5Gtk/43ZM8eNADL+Z6hvi6utZEvv 7yQFxL1cz1/hAg+Vt0ZeietaSnmDLC1ES5f4NNGJ3l1MdbuScQ5dUP0lo2x2xcCJ2d0F BHyK2s6CzX6yUDagCyHRz0Pf65O7pZzPOO4YYKpvw4TJpIretJac1UQwv4csPrHIr0SL vMRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gjYAUx7cCSy+KrACbqFxG1BPaNYntYNoHa+KVUCPqgQ=; b=ukG8BdnZGf7FzH40LFMKOcIDpsyLxProtoLkV3K+bYiaHcVTv9STcMoSdEasE67vgp 8ePtS1cVGej6AEfioRswPDctpUXZ2oaOjXHcluYK/0LCAvpwUYvAKYuEgSB7f9kbd0Ja 1jTIN1/J1SiS/gpuKrGPBTbGhNhKyamDgTM5rLopx665B9NBOAoSm8fyXEy613EDQBJY JcJGj54/nxPuomUhFj9K7DzBrCzqGSbmdJh7Dgf8vqErdIMYSU6FcCSohDpDFTdyJvYS gLeY5VTBJprzF6iltuMnEJYZyVskMaGyBnkhPOPGeWvEZnaMSz4h2my0e5P3ucTsvd0A f8wQ== X-Gm-Message-State: AIkVDXIJA0i3O4qc7CHXV/s7O64UZPjFG5zCUkaTKwfJ+CM/nRvlAz3LnfInWpX18IaTov2G X-Received: by 10.223.168.111 with SMTP id l102mr11121189wrc.150.1484911340308; Fri, 20 Jan 2017 03:22:20 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id l74sm5482402wmg.2.2017.01.20.03.22.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jan 2017 03:22:19 -0800 (PST) From: Bartosz Golaszewski To: Kevin Hilman , Sekhar Nori , Patrick Titiano , Michael Turquette , Tejun Heo , Rob Herring , Mark Rutland , Russell King , David Lechner Cc: linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski Subject: [PATCH v5 10/14] sata: ahci-da850: add a workaround for controller instability Date: Fri, 20 Jan 2017 12:22:01 +0100 Message-Id: <1484911325-23425-11-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1484911325-23425-1-git-send-email-bgolaszewski@baylibre.com> References: <1484911325-23425-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We have a use case with the da850 SATA controller where at PLL0 frequency of 456MHz (needed to properly service the LCD controller) the chip becomes unstable and the hardreset operation is ignored the first time 50% of times. The sata core driver already retries to resume the link because some controllers ignore writes to the SControl register, but just retrying the resume operation doesn't work - we need to issue he phy/wake reset again to make it work. Reimplement ahci_hardreset() in the driver and poke the controller a couple times before really giving up. Signed-off-by: Bartosz Golaszewski --- drivers/ata/ahci_da850.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) -- 2.9.3 diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c index 11dd87e..0b2b1a4 100644 --- a/drivers/ata/ahci_da850.c +++ b/drivers/ata/ahci_da850.c @@ -16,7 +16,8 @@ #include #include "ahci.h" -#define DRV_NAME "ahci_da850" +#define DRV_NAME "ahci_da850" +#define HARDRESET_RETRIES 5 /* SATA PHY Control Register offset from AHCI base */ #define SATA_P0PHYCR_REG 0x178 @@ -76,6 +77,29 @@ static int ahci_da850_softreset(struct ata_link *link, return ret; } +static int ahci_da850_hardreset(struct ata_link *link, + unsigned int *class, unsigned long deadline) +{ + int ret, retry = HARDRESET_RETRIES; + bool online; + + /* + * In order to correctly service the LCD controller of the da850 SoC, + * we increased the PLL0 frequency to 456MHz from the default 300MHz. + * + * This made the SATA controller unstable and the hardreset operation + * does not always succeed the first time. Before really giving up to + * bring up the link, retry the reset a couple times. + */ + do { + ret = ahci_do_hardreset(link, class, deadline, &online); + if (online) + return ret; + } while (retry--); + + return ret; +} + static struct ata_port_operations ahci_da850_port_ops = { .inherits = &ahci_platform_ops, .softreset = ahci_da850_softreset, @@ -83,6 +107,8 @@ static struct ata_port_operations ahci_da850_port_ops = { * No need to override .pmp_softreset - it's only used for actual * PMP-enabled ports. */ + .hardreset = ahci_da850_hardreset, + .pmp_hardreset = ahci_da850_hardreset, }; static const struct ata_port_info ahci_da850_port_info = {